Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

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Details

C257S682000, C257S686000, C257S778000, C257SE23031, C257SE25013

Reexamination Certificate

active

08039969

ABSTRACT:
A semiconductor device1includes a semiconductor chip10(first semiconductor chip), a semiconductor chip20(second semiconductor chip) and a seal ring30. The semiconductor chip20is provided on a surface S1of the semiconductor chip10so as to be spaced apart from the semiconductor chip10with a predetermined spacing therebetween. A seal ring30is interposed between the semiconductor chip10and the semiconductor chip20. An internal region, which is an inner region of the seal ring30, and an external region, which is an outer region of the seal ring30, are provided between the semiconductor chip10and the semiconductor chip20.

REFERENCES:
patent: 6297072 (2001-10-01), Tilmans et al.
patent: 6750521 (2004-06-01), Chilcott et al.
patent: 6853067 (2005-02-01), Cohn et al.
patent: 2004/0066258 (2004-04-01), Cohn et al.
patent: 2004/0197953 (2004-10-01), Funk
patent: 2005/0109455 (2005-05-01), Bai
patent: 2006/0043604 (2006-03-01), Suga et al.
patent: 2006/0097335 (2006-05-01), Kim et al.
patent: 2006/0216856 (2006-09-01), Zhao
patent: 61-89657 (1986-05-01), None
patent: 2000-232117 (2000-08-01), None
patent: 2003-17654 (2003-01-01), None
patent: 2004-128288 (2004-04-01), None
Japanese Office Action dated Sep. 14, 2010, with partial English translation.
Bernard Levine, “System-In-Package: Growing Markets, Ongoing Uncertainty”, Semiconductor Manufacturing, Mar. 2004, pp. 47-61.
Japanese Office Action dated Jul. 5, 2011 (with an English translation).

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