Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Reexamination Certificate
2009-07-16
2011-12-27
Smith, Zandra (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
C257S372000, C257S373000, C257S548000, C257S549000, C257S550000, C257SE27060
Reexamination Certificate
active
08084844
ABSTRACT:
A semiconductor device in which potential is uniformly controlled and in which the influence of noise is reduced. A p-type well region is formed beneath a surface of a p-type Si substrate. n-type MOS transistors are formed on the p-type well region. An n-type well region is formed in the p-type Si substrate so that it surrounds the p-type well region. A plurality of conductive regions which pierce through the n-type well region are formed at regular intervals. By doing so, parasitic resistance from the p-type Si substrate, through the plurality of conductive regions, to the n-type MOS transistors becomes low. Accordingly, when back bias is applied to a contact region, the back bias potential of the n-type MOS transistors can be controlled uniformly. As a result, the influence of noise from the p-type Si substrate or the p-type well region can be reduced.
REFERENCES:
patent: 6194776 (2001-02-01), Amano et al.
patent: 6891207 (2005-05-01), Pequignot et al.
patent: 7282770 (2007-10-01), Tanaka et al.
patent: 7313779 (2007-12-01), Masleid et al.
patent: 7514728 (2009-04-01), Sugahara et al.
patent: 7759740 (2010-07-01), Masleid et al.
patent: 2005/0230781 (2005-10-01), Ema et al.
patent: 2006/0220139 (2006-10-01), Tanaka et al.
patent: 2006/0267103 (2006-11-01), Tanaka
patent: 2008/0150032 (2008-06-01), Tanaka
patent: 60-206164 (1985-10-01), None
patent: 3-030468 (1991-02-01), None
patent: 04-177874 (1992-06-01), None
patent: 06-295957 (1994-10-01), None
patent: 10-199993 (1998-07-01), None
patent: WO 2004/032201 (2004-04-01), None
patent: WO 2004/061967 (2004-07-01), None
USPTO, (KALAM) Non-Final Rejection, Apr. 16, 2009, in parent U.S. Appl. No. 11/505,418 [now abandoned].
USPTO, (KALAM) Election/Restriction Requirement, Feb. 23, 2009, in parent U.S. Appl. No. 11/505,418 [now abandoned].
Japanese Office Action mailed Jun. 14, 2011 for corresponding Japanese Application No. 2006-93275, with partial English-language translation.
Fujitsu Patent Center
Fujitsu Semiconductor Limited
Joy Jeremy
Smith Zandra
LandOfFree
Semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4253823