Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

Reexamination Certificate

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Details

C257S678000, C257S691000, C257S692000, C257S724000, C257S734000, C438S106000, C438S111000, C438S122000, C438S124000

Reexamination Certificate

active

07829983

ABSTRACT:
There is provided a semiconductor device adopting, as a layout of pads connected to an external package on an LSI, a zigzag pad layout in which the pads are arranged shifted alternately, which can avoid occurrences of short-circuiting of wires, an increase in chip size due to avoidance of short-circuiting, propagation of power supply or GND noise due to reduction in IO cell interval, and signal transmission delay difference due to displacement of pad positions. In a semiconductor device wherein plural pads on a semiconductor element which are connected to function terminals on an external package are arranged in two lines along the periphery of the semiconductor element, an arrangement order of the plural pads on the semiconductor element is different from an arrangement order of the function terminals on the external package.

REFERENCES:
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patent: 6323548 (2001-11-01), Hiraga
patent: 6762490 (2004-07-01), Suzuki
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patent: 2003/0227074 (2003-12-01), Hirano
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International Search Report issued Oct. 24, 2006 in International (PCT) Application No. PCT/JP2006/315019.
Written Opinion of the ISA issued Oct. 24, 2006 in International (PCT) Application No. PCT/JP2006/315019.
International Preliminary Report on Patentability issued Nov. 27, 2007 in International (PCT) Application No. PCT/JP2006/315019.

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