Coded data generation or conversion – Digital code to digital code converters – Parallel to serial
Reexamination Certificate
2008-12-29
2010-11-09
Young, Brian (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
Parallel to serial
C341S100000
Reexamination Certificate
active
07830282
ABSTRACT:
A semiconductor device includes a plurality of synchronization blocks configured to sequentially synchronize a plurality of input signals swinging in a complementary metal oxide semiconductor (CMOS) region with multi-phase clock signals to output a plurality of output signals swinging in a current mode logic (CML) region, a plurality of first swing region converting blocks configured to convert the plurality of output signals to a plurality of converted output signals swinging in the CMOS region, a serialization block configured to serialize a plurality of converted output signals, thereby outputting a serialized signal swinging in the CML region, and a second swing region converting block configured to convert the serialized signal to a serialized output signal swinging in the CMOS region.
REFERENCES:
patent: 5563594 (1996-10-01), Ford et al.
patent: 5982309 (1999-11-01), Xi et al.
patent: 7504859 (2009-03-01), Aoki
Lee Jun-Woo
Song Taek-Sang
Hynix / Semiconductor Inc.
IP & T Group LLP
Young Brian
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