Semiconductor device

Static information storage and retrieval – Read only systems – Fusible

Reexamination Certificate

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C365S230060, C365S185230

Reexamination Certificate

active

07630226

ABSTRACT:
A memory cell includes: an irreversible storage element that writes data by breaking down an insulating film, with a write voltage being applied to its one end; and first and second transistors with one end being connected to the other end of the irreversible storage element. A non-volatile semiconductor storage device includes: the memory cell; write word lines and read word lines that are connected to the first transistor and the second transistor, respectively; write bit lines and read bit lines that are connected to the first transistor and the other end of the second transistor, respectively; a row decoder selectively driving the write word lines and the read word lines; and a write-disturb prevention circuit charging the read bit lines to a certain voltage in writing data.

REFERENCES:
patent: 2006/0193163 (2006-08-01), Ito
patent: 2006/0262627 (2006-11-01), Fricke et al.
patent: 2008/0002504 (2008-01-01), Nakano et al.
patent: 05-226599 (1993-09-01), None
U.S. Appl. No. 11/833,054, filed Aug. 2, 2007, Namekawa, et al.
U.S. Appl. No. 11/839,199, filed Aug. 15, 2007, Matsufuji, et al.
U.S. Appl. No. 11/968,893, filed Jan. 3, 2008, Namekawa.
U.S. Appl. No. 12/140,071, filed Jun. 16, 2008, Matsufuji et al.

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