Semiconductor device

Static information storage and retrieval – Floating gate

Reexamination Certificate

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Details

C365S185260, C365S185280, C365S185290, C257S316000

Reexamination Certificate

active

07623371

ABSTRACT:
p-type wells are provided within an n-type embedded well of a semiconductor substrate lying in an area for forming a flash memory, in a state of being isolated from one another. A capacitance section, a data write/erase charge injection/discharge section and a data read MIS•FET are disposed in each of the p-type wells. The capacitance section is disposed between the data write/erase charge injection/discharge section and the data read MIS•FET. In the data write/erase charge injection/discharge section, writing and erasing of data by an FN tunnel current at a channel entire surface are performed.

REFERENCES:
patent: 6545311 (2003-04-01), Shukuri et al.
patent: 6788574 (2004-09-01), Han et al.
patent: 7313026 (2007-12-01), Shiba et al.
patent: 7326994 (2008-02-01), Hsu et al.
patent: 7388777 (2008-06-01), Shiba et al.
patent: 2006/0050566 (2006-03-01), Shiba et al.
patent: 2006-80247 (2006-03-01), None

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