Semiconductor device

Details Semiconductor device Semiconductor device

2008-04-24

2009-11-10

Phung, Anh (Department: 2824)

Static information storage and retrieval

Powering

C365S154000

Reexamination Certificate

active

07616516

ABSTRACT:
A semiconductor device of the present invention has a memory cell array having plural CMOS static memory cells provided at intersecting portions of plural word lines and plural complementary bit lines. In the memory cell array, a switch MOSFET which is in an OFF state in a first operation mode and in an ON state in a second operation mode different from the first operation mode and first-conductivity-type and second-conductivity-type MOSFETs having a diode configuration are provided in parallel between a first source line to which sources of first-conductivity-type MOSFETs constituting first and second CMOS inverter circuits constituting the plural static memory cells are connected and a first power supply line corresponding to the first source line. A second source line to which sources of the second conductivity-type MOSFETs constituting the first and second CMOS inverter circuits are connected is connected to the second power supply line corresponding thereto.

REFERENCES:
patent: 6643173 (2003-11-01), Takemura
patent: 6839299 (2005-01-01), Bhavnagarwala et al.
patent: 6977519 (2005-12-01), Bhavnagarwala et al.
patent: 6999338 (2006-02-01), Hirabayashi
patent: 7092307 (2006-08-01), Chen et al.
patent: 7200030 (2007-04-01), Yamaoka et al.
patent: 2004-206745 (2004-07-01), None
patent: 2006-073065 (2006-03-01), None

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