Semiconductor device

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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Details

C327S147000, C327S148000, C327S149000, C327S150000, C327S151000, C327S152000, C327S153000, C327S157000, C327S159000, C327S160000, C327S161000

Reexamination Certificate

active

07449928

ABSTRACT:
According to the present invention, there is provided a semiconductor device including: a phase locked loop circuit having, a phase frequency detector which receives a reference signal and a frequency-divided signal, and outputs a phase difference detection signal by performing phase comparison, a charge pump which receives the phase difference detection signal and outputs a charge pump signal by converting a voltage change into a current change, a loop filter which receives the charge pump signal, and outputs a control voltage by passing components having frequencies not more than a predetermined frequency, a voltage controlled oscillator which outputs a frequency signal having a frequency based on the control voltage, and a frequency divider which receives the frequency signal, and outputs the frequency-divided signal by dividing the frequency; a mask signal generator which generates a mask signal masking a timing at which the phase frequency detector compares phases of the frequency-divided signal and the reference signal; a lock detector which detects a locked state of the phase locked loop circuit and outputs a lock detection signal; and an isolating circuit which receives the mask signal and the lock detection signal, and electrically isolates the output of the loop filter and the input of the voltage controlled oscillator from each other upon phase comparison in the locked state.

REFERENCES:
patent: 5986485 (1999-11-01), O'Sullivan
patent: 6154071 (2000-11-01), Nogawa
patent: 6853223 (2005-02-01), Ebuchi et al.
patent: 7132896 (2006-11-01), Boerstler et al.
patent: 2004/0263224 (2004-12-01), Schrodinger
patent: 11-073739 (1999-03-01), None
patent: 2001-119297 (2001-04-01), None
Cassia, A Spur-Free Fractional-N PLL for GSM Applications: Linear Model and Simulations.

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