Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257S692000, C257SE25013

Reexamination Certificate

active

07405472

ABSTRACT:
A semiconductor device, which is constituted in such a way that a pad portion of a logic chip is connected to an element region of a semiconductor chip with a bump bonding, is capable of achieving high speed operability of the elements, because delay of transmission of an electrical signal is suppressed. a logic chip is directly connected to a DRAM, therefore, it is possible to suppress an increase of load capacitance caused by interconnects, and securing a wide bus width by a multiple pin connection. As a result, it becomes possible to enhance performance of the semiconductor device upon suppressing delay of information transmission from the logic chip to the DRAM.

REFERENCES:
patent: 6335491 (2002-01-01), Alagaratnam et al.
patent: 6400008 (2002-06-01), Farnworth
patent: 6469370 (2002-10-01), Kawahara et al.
patent: 6671947 (2004-01-01), Bohr
patent: 2002/0036340 (2002-03-01), Matsuo et al.
patent: 2002/0074637 (2002-06-01), Mcfarland
patent: 2002/0079567 (2002-06-01), Lo et al.
patent: 2003/0127720 (2003-07-01), Fang
patent: 2000-012618 (2000-01-01), None

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