Semiconductor device

Details Semiconductor device Semiconductor device

2007-12-25

2007-12-25

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S189040, C365S185290

Reexamination Certificate

active

11206968

ABSTRACT:
Provided is a nonvolatile memory with less element deterioration and good data retaining properties. In a nonvolatile memory formed by the manufacturing steps of a complementary type MISFET without adding thereto another additional step, erasing of data is carried out by applying 9V to an n type well, 9V to a p type semiconductor region, and −9V to another p type semiconductor region and setting the source and drain of data writing and erasing MISFETs and data reading MISFETs at open potential to emit electrons from a gate electrode to a p well by FN tunneling. At this time, by applying a negative voltage to the p well having a capacitive element formed thereover and applying a positive voltage to the p well having the MISFETs formed thereover, a potential difference necessary for data erasing operation can be secured at a voltage low enough not to cause gate breakage.

REFERENCES:
patent: 5457335 (1995-10-01), Kuroda et al.
patent: 5610854 (1997-03-01), Ema
patent: 6788574 (2004-09-01), Han et al.
patent: 6972997 (2005-12-01), Ishimaru et al.
patent: 2003/0161192 (2003-08-01), Kobayashi et al.
patent: 2001-185638 (2001-07-01), None
patent: 2001-257324 (2001-09-01), None
patent: WO 03/096432 (2003-11-01), None

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