Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2007-03-20
2007-03-20
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S779000
Reexamination Certificate
active
11288098
ABSTRACT:
A semiconductor device is provided, in which buffer layers having a coefficient of linear expansion of 3×10−6/° C. to 8×10−6/° C. are joined to upper and lower surfaces of a silicon chip through a Pb-free solder having a thickness of not more than 0.05 mm and a melting point of not less than 250° C. The upper surface of the upper buffer layer and the lower surface of the lower buffer layer are respectively joined to a lead and a base through Pb-free solders having a thickness of not less than 0.15 mm and a melting point of not less than 250° C.
REFERENCES:
patent: 4349831 (1982-09-01), Theroux
patent: 5773885 (1998-06-01), Steele
Hiramitsu Shinji
Ishihara Shosaku
Kajiwara Ryouichi
Kariya Tadaaki
Matsuyoshi Satoshi
Antonelli, Terry Stout and Kraus, LLP.
Cao Phat X.
Hitachi , Ltd.
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