Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Reexamination Certificate
2006-06-13
2006-06-13
Vu, Phuong T. (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
C326S015000
Reexamination Certificate
active
07061735
ABSTRACT:
A semiconductor device has an electrostatic protection diode in a signal input portion thereof and is accompanied by a parasitic transistor between the diode and an output control transistor. The semiconductor device further has a dummy transistor that is formed closer than the output control transistor to the electrostatic protection diode, and an output logic determining circuit that keeps the output signal at a predetermined logic level so long as the parasitic transistor formed between the electrostatic protection diode and the dummy transistor is on. With this configuration, malfunctioning caused by a parasitic transistor can be prevented without the use of an externally fitted component.
REFERENCES:
patent: 5789968 (1998-08-01), John
patent: 6160416 (2000-12-01), Adduci et al.
patent: 6480038 (2002-11-01), Horn
patent: 7-42146 (1995-07-01), None
patent: 10-200056 (1998-07-01), None
Arent & Fox PLLC
Hoang Ann T.
Rohm & Co., Ltd.
Vu Phuong T.
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