Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2006-08-01
2006-08-01
Tran, Mai-Huong (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257SE21682, C257SE27103, C257SE29129
Reexamination Certificate
active
07084506
ABSTRACT:
The semiconductor device comprises logic blocks12forming a logic circuit, and interconnection regions14. A gate interconnection32aincluding the gate electrode of a load transistor L1and the gate electrode of a driver transistor D1, and the source/drain diffused layer38of a load transistor L2are connected to each other by a conductor plug50b. A gate interconnection32bincluding the gate electrode of a load transistor L2and the gate electrode of a driver transistor D2, and the source/drain diffused layer35of the load transistor L1are connected to each other by a conductor plug50c. The source/drain diffused layer37of a transfer transistor T1and the source/drain diffused layer37of the first driver transistor D1are made common, and the source/drain diffused layer40of the transfer transistor T2and the source/drain diffused layer40of the driver transistor D2are made common. Accordingly, the area for the memory cells to be formed in can be made very small. The memory cells having such layout are used as the memory cells of the logic blocks and the switch matrices, whereby the areas for the logic blocks to be formed in and the switch matrices to be formed in can be made small. Thus, it is possible to contribute to down-sing, high integration and large capacity, etc. of semiconductor devices.
REFERENCES:
patent: 5278785 (1994-01-01), Hazani
patent: 6400592 (2002-06-01), Peterson
patent: 9-148440 (1997-06-01), None
patent: WO 02/21536 (2002-03-01), None
Fujitsu Limited
Tran Mai-Huong
Westerman, Hattori, Daniels & Adrian , LLP.
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