Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2006-09-12
2006-09-12
Owens, Douglas W. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S686000
Reexamination Certificate
active
07105929
ABSTRACT:
A first semiconductor chip102includes an integrated circuit formed on a face which is shown upwards in FIG.2. A second semiconductor chip103includes an integrated circuit formed on a face which is shown downwards in FIG.2. Between the first semiconductor chip102and the second semiconductor chip103, a non-conductive die pad107is interposed. The die pad107is provided with connection members110protruding from the first semiconductor chip102and the second semiconductor chip103. The connection members110are plated on their surfaces so as to be electrically conductive. The integrated circuit on the first semiconductor chip102and the integrated circuit on the second semiconductor chip103are interconnected by two inter-chip connection wires104aand104b, via the connection members110. Thus, there is provided a semiconductor device composed of a plurality of internally connected semiconductor chips, such that the semiconductor device is easy to produce and requires a reduced number of component elements.
REFERENCES:
patent: 6781243 (2004-08-01), Li et al.
patent: 2001/0011766 (2001-08-01), Nishizawa et al.
patent: 2003-23136 (2003-01-01), None
Kotani Hisakazu
Nishimura Motonobu
Shishido Katsuhiko
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