Semiconductor device

Details Semiconductor device Semiconductor device

2006-07-11

2006-07-11

Potter, Roy (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S774000, C257SE21585

Reexamination Certificate

active

07075182

ABSTRACT:
The semiconductor device comprises a first conductive pattern42, a second conductive pattern42formed adjacent to the first conductive pattern42, a first conductor plug28formed below a prescribed region of the first conductive pattern42, a second conductor plug62nformed over a prescribed region of the first conductive pattern42, a third conductor plug28formed below a prescribed region of the second conductive pattern42, which is adjacent to a prescribed region of the first conductive pattern42, a fourth conductor plug62n+1formed over a prescribed region of the second conductive pattern42, a third conductive pattern64formed above the first conductive pattern42and connected to the second conductor plug62a, and a fourth conductive pattern64formed above the second conductive pattern42and connected to the fourth conductor plug62. The fourth conductor plug62n+1is arranged a position which is offset from the second conductor plug62n. The conductor plugs62n, 62n+1are offset each other in the longitudinal direction of the interconnections, whereby the parts of the interconnections having an increased width can be distanced from each other. Thus, the interconnections can be arranged at a small pitch without using an ArF exposure system and a half tone phase shift mask, which are expensive. Accordingly, the semiconductor device of high integration is provided at low costs while ensuring high fabrication yields.

REFERENCES:
patent: 6509593 (2003-01-01), Inoue et al.
patent: 6815328 (2004-11-01), Pio
patent: 2002-76048 (2002-03-01), None
patent: 2003-124249 (2003-04-01), None
patent: 2003-174105 (2003-06-01), None
patent: 2003-258090 (2003-09-01), None

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