Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Reexamination Certificate
2005-12-06
2005-12-06
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
C257S548000, C257S341000
Reexamination Certificate
active
06972475
ABSTRACT:
A semiconductor device includes an N channel MOS transistor. The N channel MOS transistor includes a first P type buried layer that isolates an N epitaxial region on a P type substrate (P-SUB) from another N epitaxial region, a drain in an N well in the N epitaxial region, a source in a P well surrounding sides of the N well to isolate the N well, and a gate on upper layer portions of the drain and the source. The MOS transistor also includes a second P type buried layer between the N well and the P well and the substrate and contiguous to the P well, and an N buried layer contiguous to the P type buried layer and the P-SUB. The N epitaxial region, the P-SUB, and the first P type buried layer are connected to ground potential.
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patent: 6169309 (2001-01-01), Teggatz et al.
patent: 2002/0110989 (2002-08-01), Yamaguchi et al.
patent: HEI 10-107168 (1998-04-01), None
patent: 2000-243973 (2000-09-01), None
Jackson Jerome
Leydig , Voit & Mayer, Ltd.
Renesas Technology Corp.
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