Semiconductor device

Details Semiconductor device Semiconductor device

2002-12-13

2004-11-09

Prenty, Mark V. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

C257S616000, C257S347000

Reexamination Certificate

active

06815735

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a semiconductor device that functions as a DTMOS or MISFET having a heterojunction type active region and, more particularly, a semiconductor device that operates at a low supply voltage.
BACKGROUND ART
Battery-driven portable personal digital assistances have come into wide use in recent years. For such devices, there is a strong demand for a reduction of supply voltages without sacrificing high-speed operations to prolong the battery life. In order to realize a high-speed operation even at a low supply voltage, it is effective to reduce a threshold voltage. In this case, there is naturally a lower limit to the threshold voltage because a leakage current when the gate is OFF increases.
Thus, as disclosed, for example, in a document “A Dynamic Threshold Voltage MOSFET (DTMOS) for Ultra-Low Voltage Operation” (F. Assaderaghi et al., IEDM94 Ext. Abst. p.809), a device called DTMOS (Dynamic Threshold Voltage MOSFET) is proposed which solves the above described problem, provides a small leakage current even at a low voltage and has high drive performance.
A conventional DTMOS includes a gate insulating film provided on an active region of a semiconductor substrate, a gate electrode, source and drain regions provided in region located at both sides of the gate in the active region and a channel region provided in a region between the source and drain regions of the substrate active region. A substrate region (body region) located below or beside the channel region is connected to the gate electrode using a wire so that the two are electrically short-circuited. Then, when a bias voltage is applied to the gate with the gate and body short-circuited, a forward bias voltage as high as the gate bias voltage is applied to the channel region through the body. This creates a state similar to that of a normal MOS transistor when the gate bias is OFF. On the other hand, when the gate bias is ON, the body is biased in the forward direction as the gate bias voltage increases, and therefore the threshold voltage decreases.
When compared to an ordinary MOS transistor (transistor whose gate is not short-circuited with the body) formed on an SOI substrate, such a DTMOS has a leakage current equivalent to the leakage current of the ordinary transistor when the gate bias is OFF. On the other hand, when the gate bias is ON, as described above, the threshold decreases, and therefore a gate-over-drive effect increases and the drive force increases significantly. Furthermore, since there is little potential difference between the gate and channel region of the DTMOS, the electric field in the longitudinal direction on the surface of the substrate becomes extremely small compared to the ordinary transistor. As a result, the deterioration of mobility of carriers with the increase of the electric field in the longitudinal direction is suppressed, which increases the drive force significantly.
Thus, the DTMOS functions as a transistor capable of a high-speed operation at a low threshold voltage, that is, a low supply voltage within an operating voltage range after a transverse parasitic bipolar transistor generated between the source region (emitter), body (base) and drain region (collector) turns ON and grows to such an extent that the substrate current becomes problematic from a practical standpoint.
PROBLEMS TO BE SOLVED
However, according to the above described conventional DTMOS, the source and channel/body are biased in the forward direction with the increase of the gate bias voltage, and therefore a current called “substrate current” flows between the source and channel/body and gate. Thus, it is preferable for the DTMOS to suppress this substrate current and at the same time reduce the threshold to thereby secure a wide operating voltage range. Since it is possible to assume a simple model in which PN junction diodes exist between the source and body and between the source and channel, the substrate current is determined by the material of the semiconductor (band gap) and concentration of impurities in the junction region. Since the source region is generally doped with impurities of high concentration on the order of 1×10
20
atoms·cm
−3
, if the concentration of impurities of the body is increased, it is possible to suppress the source-body component of the substrate current.
However, since the threshold also increases as the concentration of impurities of the body increases, it is actually difficult to secure a wide operating voltage range by increasing the concentration of impurities of the body.
DISCLOSURE OF THE INVENTION
It is an object of the present invention to provide a semiconductor device capable of increasing concentration of impurities of the body region and with a small substrate current and a wide operating voltage range.
A first semiconductor device of the present invention is provided with a semiconductor layer including at least a first semiconductor film, a second semiconductor film having a band gap different from that of the first semiconductor film constructed in such a way that the band gap decreases from the location next to the first semiconductor film in the direction away from the first semiconductor film, a gate insulating film provided on the semiconductor layer, a gate electrode provided on the gate insulating film, source and drain regions formed by introducing a first conductive type impurity to the region located at both sides of the gate electrode of the semiconductor layers, a channel region formed by introducing a second conductive type impurity to a region located between the source and drain regions of the second semiconductor film, a body region formed by introducing a second conductive type impurity which has higher concentration than the channel region to a region located between the source and drain regions of the second semiconductor film and a conductive member for electrically connecting the gate electrode and body region.
In this way, a potential recess (well) is formed at the band edge where second conductive type carriers run in the part located in the source and drain regions of the second semiconductor film, which secures a low threshold voltage and reduces an overall substrate current.
The first semiconductor film above is preferably made up of a semiconductor whose composition is expressed as Si
1−x1−y1
Ge
x1
C
y1
(0≦x1<1, 0≦y1<1) and the second semiconductor film above is preferably made up of a semiconductor whose composition is expressed as Si
1−x2−y2
Ge
x2
C
y2
(0≦x2≦1, 0≦y2≦1, x2+y2>0).
The above first semiconductor film is made of silicon and the above second semiconductor film is made of a semiconductor whose composition is expressed as Si
1−x3
Ge
x3
(0<x3≦0.4) and the Ge composition ratio of the above second semiconductor film increases from the location neighboring the first semiconductor film upward, and therefore a large band offset is formed at the edge of a valence band of the channel region and it is possible to obtain a structure appropriate for a p-channel type transistor.
The above described first semiconductor film is made of silicon, the second semiconductor film is made of semiconductor whose composition is expressed as Si
1−y3
C
y3
(0<y3≦0.03), and because the C composition ratio of the second semiconductor film increases from the location adjacent to the first semiconductor film upward, a large band offset is formed at the edge of the conduction band of the channel region, which makes it possible to obtain a structure suitable for an n-channel type transistor.
The above described first semiconductor film is made of silicon, the second semiconductor film is composed of Si
1−x4−y4
Ge
x4
C
y4
(0<x4≦0.4, 0<y4≦0.03), and therefore it is possible to obtain a structure suitable for both n-channel type and p-channel type transistors.
The above described first conductive type is an n-type and second conductive type is a p-type, and of the substrate current that flow

Affiliated with

Also associated with

Rating

Semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3345352