Semiconductor device

Static information storage and retrieval – Interconnection arrangements

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365 51, G11C 1300

Patent

active

048274496

ABSTRACT:
In semiconductor device having a memory cell array provided with a plurality of word lines extending in parallel with each other, each of the word lines includes a main word line extending throughout the entire length of the word line, and a auxiliary word line extending along and over part only of the word line. The auxiliary word lines of the adjacent word lines are staggered and do not overlap lengthwise.

REFERENCES:
patent: 4464734 (1984-08-01), McElroy
patent: 4694428 (1987-09-01), Matsumura
IEEE Journal of Solid-State Circuits, vol. SC-20, No. 5, Oct. 1985, pp. 903-907, "A 1-Mbit CMOS DRAM with Fast Page Mode and Static Column Mode," Saito et al.

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