Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Reexamination Certificate
2002-07-10
2004-09-07
Prenty, Mark V. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
C257S643000, C257S072000
Reexamination Certificate
active
06787887
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a structure of a semiconductor device which can be used for a flat panel display typified by an active matrix type liquid crystal display and an EL type display unit and more particularly to a structure of an inter-layer insulating film of a semiconductor device typified by a thin film transistor.
2. Description of Related Art
Hitherto, an active matrix type liquid crystal display has been known as a typical flat panel display. It has a structure in which a switching thin film transistor is provided in each of a large number of pixels disposed in a matrix and charge input/output to/from each pixel electrode is controlled by this thin film transistor.
In such a structure, it is necessary to coat the semiconductor device by an insulating film to prevent moisture, impurities and moving ions (e.g., sodium ions) which are great enemy of the semiconductor device from infiltrating. Further, it must be constructed such that capacity produced between the pixel electrode, wires and the thin film transistor can be reduced.
Further, it is required to have a low production cost and an excellent productivity. However, it is the present situation that those requirements cannot be met with a silicon oxide film or a silicon nitride film which are normally utilized as an inter-layer insulating film.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention disclosed in this specification to provide a novel structure required to the aforementioned inter-layer insulating film. That is, it is an object of the present invention to provide a structure of a semiconductor device having an inter-layer insulating film which can prevent moisture and impurities from infiltrating, which can suppress the capacity produced between the thin film transistor, pixel electrode and wires, whose cost is low and which has a high productivity.
According to one of the present invention disclosed in the present specification, a semiconductor device comprises an inter-layer insulating film made from a resin material disposed at the upper part of a semiconductor element; and a silicon oxide film or a silicon nitride film formed on the whole surface of an underlying layer on which the inter-layer insulating film is formed.
According to another structure of the present invention, a semiconductor device comprises an inter-layer insulating film made from a resin material disposed at the upper part of a semiconductor element; and a laminated film of a silicon oxide film and a silicon nitride film formed on the whole surface of an underlying layer on which the inter-layer insulating film is formed.
In the above-mentioned structure, either the silicon oxide film or the silicon nitride film may be put first in the order of lamination. However, it is preferable to form the silicon nitride film as the lower layer from its adhesiveness and good interfacial characteristics when the semiconductor element is to be covered.
According to a still other structure of the present invention, a semiconductor device comprises an inter-layer insulating film made from a resin material disposed at the upper part of a semiconductor element; and a silicon oxynitride film formed on the whole surface of an underlying layer on which the inter-layer insulating film is formed.
According to another structure of the present invention, a semiconductor device comprises an inter-layer insulating film made from a resin material disposed at the upper part of a semiconductor element; and a silicon oxide film or a silicon nitride film formed between the semiconductor element and the inter-layer insulating film.
According to a still other structure of the present invention, a semiconductor device comprises an inter-layer insulating film made from a resin material disposed at the upper part of a semiconductor element; and a silicon oxynitride film formed between the semiconductor element and the inter-layer insulating film.
According to a still other structure of the present invention, a semiconductor device comprises an inter-layer insulating film made from a resin material disposed at the upper part of a semiconductor element; and a laminated film of a silicon oxide film and a silicon nitride film formed between the semiconductor element and the inter-layer insulating film.
Capacity produced between a pixel electrode, wires and a thin film transistor may be reduced by using the laminated film of the silicon nitride film and the resin film as the inter-layer insulating film covering the upper part of the thin film transistor.
Further, because it is possible to flatten the surface of the resin material, no section for riding across a difference in level of wires is formed, thus allowing to prevent local change of resistance of the wires and breaking of the wires.
Further, it is possible to suppress moisture within the resin film from exerting an ill effect to the operation of the thin film transistor by providing the silicon nitride film between the resin film and the thin film transistor so that the resin film does not contact directly with the thin film transistor.
The above and other related objects and features of the invention will be apparent from a reading of the following description of the disclosure found in the accompanying drawings and the novelty thereof pointed out in the appended claims.
REFERENCES:
patent: 3844908 (1974-10-01), Matsuo et al.
patent: 4103297 (1978-07-01), McGreivy et al.
patent: 4226898 (1980-10-01), Ovshinsky et al.
patent: 4239346 (1980-12-01), Lloyd
patent: 4523370 (1985-06-01), Sullivan et al.
patent: 4557036 (1985-12-01), Kyuragi et al.
patent: 4597637 (1986-07-01), Ohta
patent: 4618878 (1986-10-01), Aoyama et al.
patent: 4680580 (1987-07-01), Kawahara
patent: 4759610 (1988-07-01), Yanagisawa
patent: 4800174 (1989-01-01), Ishihara et al.
patent: 4818077 (1989-04-01), Ohwada et al.
patent: 4853760 (1989-08-01), Abe et al.
patent: 4864376 (1989-09-01), Aoki et al.
patent: 4938565 (1990-07-01), Ichikawa
patent: 4949141 (1990-08-01), Busta
patent: 5003356 (1991-03-01), Wakai et al.
patent: 5012228 (1991-04-01), Masuda et al.
patent: 5051570 (1991-09-01), Tsujikawa et al.
patent: 5055899 (1991-10-01), Wakai et al.
patent: 5056895 (1991-10-01), Kahn
patent: 5066110 (1991-11-01), Mizushima et al.
patent: 5084905 (1992-01-01), Sasaki et al.
patent: 5091334 (1992-02-01), Yamazaki et al.
patent: 5117278 (1992-05-01), Bellersen et al.
patent: 5132821 (1992-07-01), Nicholas
patent: 5200846 (1993-04-01), Hiroki et al.
patent: 5206183 (1993-04-01), Dennison
patent: 5227900 (1993-07-01), Inaba et al.
patent: 5233211 (1993-08-01), Hayashi et al.
patent: 5235195 (1993-08-01), Tran et al.
patent: 5286659 (1994-02-01), Mitani et al.
patent: 5287205 (1994-02-01), Yamazaki et al.
patent: 5289016 (1994-02-01), Noguchi
patent: 5306651 (1994-04-01), Masumo et al.
patent: 5327001 (1994-07-01), Wakai et al.
patent: 5371398 (1994-12-01), Nishihara
patent: 5453858 (1995-09-01), Yamazaki
patent: 5474941 (1995-12-01), Mitani et al.
patent: 5488000 (1996-01-01), Zhang et al.
patent: 5495353 (1996-02-01), Yamazaki
patent: 5499123 (1996-03-01), Mikoshiba
patent: 5500538 (1996-03-01), Yamazaki et al.
patent: 5514879 (1996-05-01), Yamazaki
patent: 5568288 (1996-10-01), Yamazaki et al.
patent: 5583369 (1996-12-01), Yamazaki et al.
patent: 5585951 (1996-12-01), Noda et al.
patent: 5604380 (1997-02-01), Nishimura et al.
patent: 5612799 (1997-03-01), Yamazaki
patent: 5614732 (1997-03-01), Yamazaki
patent: 5641974 (1997-06-01), den Boer et al.
patent: 5654203 (1997-08-01), Ohtani et al.
patent: 5684365 (1997-11-01), Tang et al.
patent: 5686328 (1997-11-01), Zhang et al.
patent: 5701167 (1997-12-01), Yamazaki
patent: 5705829 (1998-01-01), Miyanaga et al.
patent: 5731628 (1998-03-01), Terashima
patent: 5763899 (1998-06-01), Yamazaki et al.
patent: 5818550 (1998-10-01), Kadota et al.
patent: 5821138 (1998-10-01), Yamazaki et al.
patent: 5837619 (1998-11-01), Adachi et al.
patent: 5844254 (1998-12-01), Manning et al.
patent: 5849043 (1998-12-01), Zhang et al.
pa
Fish & Richardson PC
Prenty Mark V.
Semiconductor Energy Laboratory Co,. Ltd.
LandOfFree
Semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3257233