Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – With integrated trigger signal amplification means
Reexamination Certificate
2002-07-15
2004-05-04
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Regenerative type switching device
With integrated trigger signal amplification means
C257S194000, C330S277000, C330S286000
Reexamination Certificate
active
06730945
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a power amplifier for use with an RF signal, such as a power amplifying MMIC (microwave monolithic integrated circuit). More specifically, the invention relates to a power merging circuit fabricated on a semiconductor chip.
2. Background Art
An increase in the output of a power amplifier for use with an RF signal has recently been pursued. Included among MMICs operating at a range of 20 to 40 GHz is one which produces an output of 1W or more. In a final output stage of such a high-output RF power amplifier, four or more active elements are connected in shunt with each other.
FIG. 9
is a view showing an output merging section of a conventional power amplifier. Four active elements
2
are connected together by means of transmission lines, and outputs are merged into a single output. As illustrated, a mainstream method for merging outputs from active elements is connecting active elements with transmission lines according to a tournament method.
In the case of an MMIC used in a communications device for microwaves/millimeter waves, cost-cutting owing to a reduction in the size of a chip is important. However, as shown in
FIG. 9
, connection of active elements based on the tournament method encounters difficulty in miniaturizing a circuit. Although not shown in
FIG. 9
, in an actual circuit a bias voltage must be applied to each of the active elements
2
. A bias circuit is usually known to have a short stub of &lgr;/4, provided that a signal frequency is taken as &lgr;. For this reason, if an attempt is made to achieve commonality of wiring so that a bias voltage can be applied to one external terminal, the area of a circuit is increased, and the wiring becomes complicated. Particularly, in the case of an inter-stage circuit of a multi-stage amplifier, there is also a necessity for use of a circuit for distributing an input to the next stage, in addition to a power merging circuit and a bias commonality circuit in a preceding stage. As a result, the circuit becomes more complicated, inevitably leading to an increase in the area of the circuit.
The present invention provides a compact power amplifier having a simple circuit configuration for solving the problem.
SUMMARY OF THE INVENTION
In one embodiment of the present invention, a semiconductor device has three or more amplifying circuits which amplify power by means of active elements and a merging circuit for merging outputs from the amplifying circuits, wherein the merging circuit is constituted of an integral distributed constant line and a plurality of regulation circuits connected in parallel with the distributed constant line, and the respective amplifying circuits are connected to the distributed constant line by way of a side constituting one edge of the distributed constant line.
Each of the amplifying circuits is preferably constituted of only the active element. The regulation circuit is preferably a short stub.
The active element is, for example, a MESFET or HEMT. A gate width of the MESFET or HEMT is determined on the basis of a distance from nodes provided along the side by way of which the MESFET or HEMT is connected, to the distributed constant line, to the side of the distributed constant line.
In another embodiment of the present invention, a semiconductor device comprises a plurality of power amplifiers connected in series and/or parallel with each other. The power amplifier has three or more amplifying circuits which amplify power by means of active elements and a merging circuit for merging outputs from the amplifying circuits, wherein the merging circuit is constituted of an integral distributed constant line and a plurality of regulation circuits connected in parallel with the distributed constant line, and the respective amplifying circuits are connected to the distributed constant line by way of a side constituting one edge of the distributed constant line.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
REFERENCES:
patent: 5065117 (1991-11-01), Yoshimasu
patent: 5087893 (1992-02-01), Petersen et al.
patent: 5160984 (1992-11-01), Mochizuki et al.
patent: 5283452 (1994-02-01), Shih et al.
patent: 5546049 (1996-08-01), Wen et al.
patent: 5786737 (1998-07-01), Goto
patent: 5793253 (1998-08-01), Kumar et al.
patent: 5945700 (1999-08-01), Mizutani
patent: 6114923 (2000-09-01), Mizutani
patent: 6181205 (2001-01-01), Loval et al.
patent: 6313677 (2001-11-01), Okayasu
patent: 6342815 (2002-01-01), Kobayashi
patent: 6380787 (2002-04-01), Forbes
patent: 6421390 (2002-07-01), Burkhart
patent: 6472941 (2002-10-01), Shigematsu
patent: 1 217 725 (2002-06-01), None
patent: 3-136401 (1991-06-01), None
patent: 5-129854 (1993-05-01), None
patent: 11-74703 (1999-03-01), None
patent: 2002-33627 (2002-01-01), None
Flynn Nathan J.
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
Sefer Ahmed N.
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