Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
2001-03-02
2004-07-06
Tran, Thien F (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S066000, C257S072000, C257S344000, C257S347000, C257S408000
Reexamination Certificate
active
06759678
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor display device using a semiconductor element (an element using a semiconductor thin film). Further, the present invention relates to electronic equipment using the semiconductor display device in a display portion.
2. Description of the Related Art
Techniques of using a semiconductor thin film (on the order of several nni to several hundreds of nm thick) formed on a substrate having an insulating surface in order to form a thin film transistor (TFT) have been in the spotlight in recent years. Thin film transistors are widely applied to electronic devices such as ICs and semiconductor display devices, and in particular, are rapidly being developed as switching elements for liquid crystal display devices and EL display devices.
EL display devices are also referred to as organic EL displays (OELDs) and as organic light-emitting diodes (OLEDs).
EL display devices are self-light-emitting. EL devices have a structure in which a layer containing an organic compound (EL layer) is sandwiched between a pair of electrodes (an anode and a cathode), and the EL layer usually has a lamination structure. A lamination structure of a hole transporting layer, a light-emitting layer, and an electron transporting layer developed by Tang, et al., of Eastman Kodak Company can be given as a typical lamination structure. This structure has extremely high light-emitting efficiency, and most of the EL display devices currently being researched and developed employ this structure.
Electro luminescence generated by the addition of an electric field is obtained in the EL element, which has an anode layer, an EL layer, and a cathode layer. There is emission of light in the organic compound when returning to a base state from a singlet excitation state (fluorescence), and when returning to a base state from a triplet excitation state (phosphorescence), and the EL display device of the present invention may use both types of light emission.
Further, a structure in which a hole injecting layer, a hole transporting layer, a light-emitting layer, and an electron transporting layer are laminated in order on an anode; and a structure in which a hole injecting layer, a hole transporting layer, a light-emitting layer, an electron transporting layer, and an electron injecting layer are laminated in order on an anode may also be used. Doping, of a material such as a fluorescent pigment into the light-emitting layer may also be performed.
All layers formed between an anode and a cathode are referred to generically as an EL layer within this specification. The above stated hole injecting layer, hole transporting layer, light-emitting layer, electron transporting layer, and electron injecting layer are therefore all contained within the EL layer.
Note that the emission of light by the EL element is referred to as driving of the EL element in this specification. Note also that, throughout this specification, light-emitting elements formed by an anode, an EL layer, and a cathode are referred to as EL elements.
An active matrix EL display device has a pixel portion with a plurality of pixels, each of which has a TFT and an EL element. An image is displayed in the pixel portion by controlling the electric current flowing in the EL element with TFT.
In particular, a high mobility can be obtained from a TFT using a semiconductor film having a crystalline structure as an active layer (crystalline TFT), and it is therefore possible to integrate functionality circuits on the same substrate and realize a high definition image display.
Semiconductor films having a crystalline structure include single crystal semiconductors, polycrystalline semiconductors, and microcrystalline semiconductors in this specification, and in addition, include the semiconductors disclosed in Japanese Patent Application Laid-open No. Hei 7-130652, Japanese Patent Application Laid-open No. Hei 8-78329, Japanese Patent Application Laid-open No. Hei 10-135468, and Japanese Patent Application Laid-open No. Hei 10-135469.
Between one million and two million crystalline TFTs are necessary in only a pixel matrix circuit (hereafter referred to as pixel portion) in order to structure the active matrix EL display device, and more than that number of crystalline TFTs are required for the attached functionality circuits formed in the periphery. The specifications required for the EL display device are strict, and in order to perform stable image display, it is necessary to assure the reliability of each crystalline TFT.
TFT characteristics can be considered as divided between those of an on state and those of an offstate. Characteristics such as on current, mobility, S-value, and threshold value are known as on state characteristics, and off current is the most important off state characteristic.
However, there is a problem in that the off current easily becomes high with crystalline TFTs.
Furthermore, crystalline TFTs are still not used in MOS transistors (transistors manufactured on a single crystalline semiconductor substrate) using LSIs from a reliability standpoint. For example, a degradation phenomenon in which the mobility and the on current (the electric current flowing when the TFT is in an on state) drop, and the off current (the electric current flowing when the TFT is in an off state) rise, when a crystalline TFT is continuously driven have been observed. It is thought that the hot carrier effect is the cause, and that the degradation phenomenon is caused by hot carriers developing due to a high electric field in the vicinity of a drain.
A lightly doped drain (LDD) structure is known as a method of lowering the off current in a MOS transistor by relieving the high electric field in the vicinity of the drain. A low concentration impurity region is formed on the outside of a channel region with this structure, and the low concentration impurity region is referred to as an LDD region.
In particular, the high electric field in the vicinity of the drain is relieved, the hot carrier effect can be prevented, and the reliability can be increased when there is a structure in which the LDD region overlaps with a gate electrode through a gate insulating film (gate-drain overlapped LDD, GOLD structure). Note that a region in which the LDD region overlaps with the gate electrode through the gate insulating film is referred to as an Lov region (first LDD region) (“ov” indicates “overlap) in this specification.
Note also that structures such as an LATID (large tilt angle implanted drain) structure and an ITLDD (inverse T LDD) structure are known as GOLD structures. There is a GOLD structure in which sidewalls are formed by silicon, for example, reported in Hatano, M., Akimoto, H, and Sakai, T, IEDM
97
Technical Digest, p. 523-6, 1997, and it has been confirmed that an extremely superior reliability can be obtained compared with other TFT structures.
Note that, in this specification, a region in which the LDD region does not overlap with the gate electrode through the gate insulating film is referred to as an Loff region (second LDD region) (“off” indicates “offset”) in this specification.
Several methods of manufacturing a TFT possessing both an Loff region and an Lov region have been proposed. A method of using a mask, and a method using a gate electrode having two layers with mutually differing widths and a gate insulating film by self-alignment, can be given as methods of forming the Lov region and the Loff region.
However, two masks are required in order to form the Lov region and the Loff region when using a mask, and the number of process steps is increased. On the other hand, when forming the Lov region and the Loff region by self alignmenit, the number of masks need not be increased, and it is possible to suppress the number of process steps. However, the width of the gate electrode and the thickness of the gate insulating film influence the position in which the Lov region and the Loff region are formed. The etching rates of the gate electrode and the gate i
Arao Tatsuya
Koyama Jun
Ono Koji
Suzawa Hideomi
Yamazaki Shunpei
Fish & Richardson P.C.
Semiconductor Energy Laboratory Co,. Ltd.
Tran Thien F
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