Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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C257S059000, C257S749000

Reexamination Certificate

active

06680488

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor device including a circuit constituted by thin film transistors (hereinafter called “TFTs”) and a fabrication method thereof. For example, the invention relates to an opto-electric device typified by a liquid crystal display panel and an electronic apparatus having such an opto-electric device as a component mounted thereto.
The term “semiconductor device” used in this specification means all those devices which function by utilizing semiconductor characteristics. Therefore, opto-electric devices, semiconductor circuits and electronic apparatuses are herein all semiconductor devices.
2. Description of the Related Art
A technology that forms a thin film transistor (TFT) by using a semiconductor thin film (thickness is several to hundreds of nm) formed on a substrate having an insulating surface has drawn an increasing attention in recent years. The thin film transistor has gained a wide application in electronic devices such as IC and opto-electric devices, and particularly development of TFT as a switching element for a liquid crystal display device has been hurriedly carried out.
To obtain high quality images in a liquid crystal display device, an active matrix type liquid crystal display device that arranges pixel electrodes in matrix and uses TFT as switching element connected to the respective pixel electrodes has drawn an attention.
To acquire high quality display in this active matrix type liquid crystal display device, each pixel electrode connected to TFT must hold a potential of a video signal till a next write operation. Generally, a storage capacitance (Cs) is provided inside the pixel so as to hold the potential of the vide signal.
Various proposals have so far been made as to the structure of the above storage capacitance (Cs) and its formation method. From the aspect of easiness of forming steps and reliability, however, preferred is a method that utilizes a gate insulating film of TFT as an insulating film having the highest quality among the insulating films constituting the pixel as a dielectric of the storage capacitance (Cs). It has been customary in the past to arrange a capacitance wire to function as an upper electrode by using a wiring layer that is the same as a scanning line, and to constitute the storage capacitance (Cs) by the upper electrode (capacitance wire)/dielectric layer (gate insulating film)/lower electrode (semiconductor film).
From the aspect of display performance, the pixel must have a large storage capacitance as well as a high aperture ratio. When each pixel has a high aperture ratio, light utilization efficiency of backlight can be improved and a backlight capacity for attaining predetermined display luminance can be limited. In consequence, power consumption of the display device and its size can be reduced. When each pixel has a large storage capacitance, display data holding performance of each pixel can be improved with the result of improvement in display quality.
These requirements impose a critical problem on miniaturization of each display pixel pitch resulting from higher precision of the liquid crystal display device (increase of the number of pixels) and the reduction of its size.
Another problem in the pixel structure according to the prior art described above is that it is difficult to simultaneously satisfy a high aperture ratio and a large storage capacitance.
Still another problem is the occurrence of fluctuation of TFT characteristics provided to each pixel and resulting degradation of image quality in a liquid crystal display device using backlight, particularly in a liquid crystal display device for a projector.
The inventor of the invention has examined the causes of fluctuation of TFT characteristics and has found it is one of problems that rays of diffracted light (also called “interference light”) reach the semiconductor layer or in other words, rays of light are irradiated to the semiconductor layer while taking a detour route round an end part of a light shielding layer so disposed on the light irradiation side as to overlap with the semiconductor layer.
FIG. 2
shows a simulation result. The drawing assumes an active matrix substrate having a structure wherein a semiconductor layer
201
is formed on a substrate
200
, an insulating film
202
having a thickness of 150 nm is so disposed as to cover the semiconductor layer
201
and a light shielding layer
203
having transmissivity of 0% is disposed on the insulating film
202
. In this case, the end part of the light shielding layer
203
is 0 m when the rays of light are irradiated from a light source, and the intensity of diffracted light is calculated. The abscissa in the drawing represents a distance X m from the end part of the light shielding layer
203
and the ordinate does the intensity of light. The mean value of the optical intensity of the aperture portion ((−) region of the left half of the graph) is assumed to be 1.
When the end part of the light shielding layer is so arranged as to coincide with that of the semiconductor layer in
FIG. 2
, the intensity is the value of the ordinate of X=0 m in
FIG. 2
, that is, about ¼ of light from the light source. Therefore, when the end part of the light shielding layer is coincident with that of the semiconductor layer, about ¼ of the rays of light from the light source is irradiated to the semiconductor layer.
The optical intensity at X=1 &mgr;m of the ordinate is about {fraction (1/50)} of light from the light source and the intensity at X=1.3 &mgr;m on the ordinate is about {fraction (1/100)} of light from the light source. This means that even when the end part of the light shielding layer is spaced apart by 1 &mgr;m or by 1.3 &mgr;m from the end part of the semiconductor layer, a small amount of light is irradiated to the semiconductor layer.
The light shielding layer is disposed in existing devices but influences of diffracted light are not taken into account. In order to improve the aperture ratio, that is, in order to reduce the area of the light shielding layer, the end part of the semiconductor layer is at least brought into conformity with the end part of the light shielding layer and pixels are structured so as to merely prevent incident light from the light source.
SUMMARY OF THE INVENTION
The invention provides a solution to the problem described above from the design side and provides a liquid crystal display device having high display quality by preventing rays of light diffracted at an end part of a light shielding layer from being irradiated to a semiconductor layer, by securing a sufficient storage capacitance (Cs) while keeping a high aperture ratio, and at the same time by dispersing time-wise and reducing effectively a load of a capacitance wire (pixel write current).
One of the characterizing features of the invention resides in that a first light shielding layer or a gate electrode cuts off rays of light diffracted by a second light shielding layer disposed over a semiconductor layer. According to the result shown in
FIG. 2
, the area of the light shielding layer must be increased to sufficiently cut off the rays of light diffracted by one light shielding layer and as a result the aperture ratio drops. When two or more light shielding layers formed in different layers are used in superposition, however, it is possible to cut off the rays of diffracted light without increasing the area of the light shielding layers. Incidentally, a first light shielding layer may be a conductor pattern simultaneously formed with a source or drain electrode, or a part of the source or drain electrode.
According to one aspect of the invention disclosed in the present specification, there is provided a semiconductor device comprising a semiconductor layer on an insulating surface, a first insulating film on the semiconductor layer, a gate electrode overlapping with the semiconductor layer on the first insulating film, a second insulating film on the gate electrode

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