Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame
Reexamination Certificate
2001-06-28
2004-05-18
Graybill, David E. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With structure for mounting semiconductor chip to lead frame
C257S695000, C257S724000, C257S735000, C257S787000, C257S684000, C257S777000
Reexamination Certificate
active
06737736
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device. Specifically, the invention relates to a semiconductor device with densely stacked semiconductor chips and a manufacturing method thereof.
2. Description of the Background Art
Most conventional methods of mounting a semiconductor chip(s) have employed die bonding of one semiconductor chip to a single lead frame. Referring to
FIG. 36
, a semiconductor chip
101
is attached directly onto a die pad
103
integrated with a lead frame by means of adhesive or double-faced tape. A terminal electrode (not shown) of the semiconductor chip and a lead terminal
104
are connected by a wire
105
and they are further encapsulated by an encapsulating resin for the purpose of protection from moisture, impact and the like. Although this type of semiconductor device can be manufactured in a simple manner and its many advantages have been proved, it has a problem of a low ratio of the semiconductor chip relative to a unit volume in which the semiconductor chip is housed.
Accordingly, as shown in
FIG. 37
, a semiconductor device has been proposed including two stacked semiconductor chips
101
a
and
101
b
(Japanese Patent Laying-Open No. 2000-156464). This semiconductor device includes a lower semiconductor chip
101
b
attached to one frame
104
a
by adhesive
107
and an upper semiconductor chip
101
a
attached to the other frame
104
b
. The semiconductor chips are further bonded to each other by adhesive
107
. Respective terminal electrodes (not shown) of the semiconductor chips and lead terminals (not shown) are connected by means of wires (not shown) and encapsulated by an encapsulating resin
106
. In plan view, the semiconductor chips of the semiconductor device shown in
FIG. 37
mostly overlap one another with a small displacement therebetween. In this way, the semiconductor device shown in
FIG. 37
achieves a dramatic densification as compared with the semiconductor device shown in FIG.
36
.
Through never-ending progress in downsizing of semiconductor chips, a semiconductor chip is now almost thinner than a lead frame. Such semiconductor chips have become highly dense, while densification of a semiconductor device mounting these semiconductor chips is insufficient. In particular, current semiconductor devices are not thin enough as thinning thereof has rarely received attention. Then, with a rapid prevalence of mobile data terminals like mobile phones, digital cameras, video camera and the like, there arise strong demands for downsizing and densification in consideration of the thickness of a semiconductor device. Downsizing and densification of a semiconductor device with its thickness reduced without an increase in area would provide desirable effects not only in such uses as mentioned above but in many other uses.
SUMMARY OF THE INVENTION
The present invention aims to provide a semiconductor device and a manufacturing method thereof achieving downsizing and densification by reducing the thickness of the semiconductor device without increase in area.
According to a first aspect of the present invention, a semiconductor device has terminal electrodes arranged, in plan view, outside a region where semiconductor chips are arranged. The semiconductor device includes a lower semiconductor chip located to overlap in the range of height with the terminal electrodes, an upper semiconductor chip located above the lower semiconductor chip, a wire connecting the upper and lower semiconductor chips to the terminal electrodes, and an encapsulating resin encapsulating the upper and lower semiconductor chips and the wire. The encapsulating resin and the terminal electrodes have respective bottom surfaces coplanar with each other.
The semiconductor chips and the terminal electrodes are arranged so that the terminal electrodes do not increase the thickness of the semiconductor device by their full thickness dimension. Namely, the thickness of terminal electrodes does not affect the thickness of the semiconductor device or merely a part thereof adds the thickness of the semiconductor device. It is thus possible to make the semiconductor device thinner regardless of the thickness of a lead frame where the terminal electrodes are formed. Consequently, downsizing and densification of products such as mobile data terminal can be promoted. Further, as the bottom surfaces of the encapsulating resin and terminal electrodes are coplanar, the terminal electrodes can be affixed onto an adhesive tape to form the semiconductor device having the above-described structure and use the adhesive tape as an outer surface of the encapsulating resin serving also as a resin-leak-prevention sheet thereby accomplishing resin encapsulation, for example. In this way, manufacture can be simplified.
Regarding the semiconductor device according to the first aspect of the invention, the upper semiconductor chip may be supported by a die pad portion coplanar with the terminal electrodes and the lower semiconductor chip may be arranged without overlapping in plan view with the die pad portion, for example.
This structure enables the upper semiconductor chip to firmly be supported. The upper semiconductor chip together with the die pad portion may be bonded to the lower semiconductor chip. Alternatively, the upper and lower semiconductor chips may be separated to fill the space between the chips with the encapsulating resin. Here, “support” means that the chip is supported by the die pad portion by adhering them together using adhesive, die bonding material or the like.
Regarding the semiconductor device according to the first aspect of the invention, the lower semiconductor chip and the encapsulating resin may have respective bottom surfaces coplanar with each other and the bottom surface of the lower semiconductor chip may be exposed from the encapsulating resin, for example.
With this structure, it is possible, for example, to affix the lower semiconductor chip together with the terminal electrodes onto an adhesive tape so as to fabricate the semiconductor device, so that manufacture is simplified. Further, the lower semiconductor chip only may be used to support the upper semiconductor chip to eliminate the die pad portion, reducing a manufacturing cost.
Regarding the semiconductor device according to the first aspect of the invention, the upper semiconductor chip may be supported by a die pad portion located higher than the terminal electrodes, and the lower semiconductor chip may have its bottom surface encapsulated by the encapsulating resin, for example.
With this structure, the lower semiconductor chip is supported such that it suspends from the upper semiconductor chip supported by the die pad portion, and accordingly the lower semiconductor chip can be arranged inwardly spaced from the bottom surface of terminal electrodes. The lower semiconductor chip is thus encapsulated by the encapsulating resin to enable the entire semiconductor device to be protected from moisture, direct impact and the like.
The semiconductor device according to the first aspect of the invention is of QFN (Quad Flat Non-Lead Package) type having the terminal electrodes arranged outside to surround the semiconductor chips, for example.
The terminal electrodes arranged to surround the semiconductor chips and the semiconductor chips and the electrodes are nearly located. Consequently, wiring of the electrodes and chips becomes simplified. Then, there is a higher degree of freedom for partially overlapping two semiconductor chips.
Regarding the semiconductor device according to the first aspect of the invention, the upper and lower semiconductor chips may be rectangles respectively in shape, connection terminals of the semiconductor chips may be arranged along shorter sides opposing each other of the rectangles, and the upper and lower semiconductor chips being rectangles in shape may be arranged to cross each other in plan view, for example.
Connection terminals are thus dist
Abe Shun-ichi
Izumi Naoki
Uebayashi Tetsuya
Yamazaki Akira
Graybill David E.
Leydig , Voit & Mayer, Ltd.
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