Semiconductor device

Details Semiconductor device Semiconductor device

2002-04-05

2004-03-09

Baumeister, B. William (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Bipolar transistor structure

With specified electrode means

C257S585000, C257S586000, C257S587000

Reexamination Certificate

active

06703686

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor device having electrodes formed on a surface of a semiconductor layer while vertically forming a pn junction in the semiconductor layer, e.g. transistors or diodes on an IC or LSI. More particularly, the invention relates to a semiconductor device having a structure not to impair device characteristic while reducing the series resistance between the electrode connected to a lower layer of a vertically formed device and the lower layer.
BACKGROUND OF THE INVENTION
The bipolar transistor, formed as a part of an IC, has an n-type semiconductor layer
22
epitaxially grown, e.g. in a thickness of approximately 10 &mgr;m, on the surface of a p-type semiconductor substrate
21
, as shown in FIG.
5
A. Through the surface, p-type and n-type impurities are diffused in order, to form a base region
23
and an emitter region
24
. The semiconductor layer
22
is used as a collector region. The transistor is formed having a vertical current path I, as shown in FIG.
5
A.
In the case of a discrete transistor, an n
+
-type substrate may be used as a semiconductor substrate
21
to form a collector electrode at a backside thereof. In the case of an IC, used is a p-type semiconductor substrate having a conductivity type different from a conductivity type of a device-forming semiconductor layer, in order for electrical isolation between devices, as shown in
FIG. 5A. A
collector electrode
25
is provided on the surface of the semiconductor layer
22
. On the base region
23
and the emitter region
24
, a base electrode
26
and an emitter electrode
27
are respectively provided through an insulation film
28
on the surface of the semiconductor layer
22
.
In this case, the semiconductor layer
22
cannot sufficiently increase its impurity concentration in an attempt to obtain a desired transistor characteristic, i.e. grown in an impurity concentration of approximately 5×10
13
-1×10
17
cm
−3
. Because of the resistance increase through the path to the collector electrode, an n
+
-type (impurity concentration of approximately 1×10
19
cm
−3
) low resistance region
22
a
called a collector wall is formed extending from an upper surface of the semiconductor layer
22
toward a lower surface thereof as shown in
FIG. 5A. A
collector electrode
25
is formed in contact with the low resistance region
22
a
. Incidentally, although not shown, there is a case that an n
+
-type buried layer is formed in the boundary, below the base region
23
, between the semiconductor substrate
21
and the semiconductor layer
22
, in order to reduce the resistance in a lateral direction of the semiconductor layer
22
in the below of the base region
23
.
As in the foregoing transistor structure, in the case of forming an electrode on the surface of the semiconductor layer despite a contact is to be taken to a layer beneath the semiconductor layer, a low resistance region
22
a
is formed extending from the upper surface of the semiconductor layer
22
to nearly the reach point to the lower surface, in order to reduce the resistance along the path. However, because the low resistance region is generally formed by diffusion after epitaxial growth of the semiconductor layer
22
, the impurity in the semiconductor layer
21
diffuses into the semiconductor layer
22
during the diffusion, as shown in FIG.
5
B. This results in a problem that the impurity concentration in the semiconductor layer
22
deviates from its desired characteristic of device.
Meanwhile, in the case of forming a device only in a less-diffusive region of the semiconductor layer without using the above region in anticipation of the diffusion, the epitaxially-grown semiconductor layer requires thickness increase. The diffusion distance of from the semiconductor substrate to the semiconductor layer is approximately 2-3 &mgr;m, requiring thickness increase correspondingly. This raises a problem with time increase in epitaxial growth and hence cost increase. In the case of forming a buried layer in the lower surface of the semiconductor layer, impurity concentration similarly varies in the semiconductor layer.
SUMMARY OF THE INVENTION
The present invention has been made in order to solve these problems. It is an object to provide a semiconductor device that a low resistance region can be formed without increasing the thickness of an eitaxial growth layer while having less effect of diffusion or the like upon other regions where forming, for example, a low resistance region called a transistor collector wall depthwise in a semiconductor layer to provide connection to an electrode.
A semiconductor device according to the present invention includes: a semiconductor substrate; a first conductivity type low impurity concentration semiconductor layer formed on the semiconductor substrate; a second conductivity type diffusion region at least provided to vertically form a semiconductor element in the low impurity concentration semiconductor layer; and first and second electrodes formed in a surface of the semiconductor layer respectively electrically connected to the first conductivity type low impurity concentration semiconductor layer and the second conductivity type diffusion region; wherein the first electrode is formed on a surface of a first conductivity type low resistance region of a polycrystal semiconductor formed depthwise in the low impurity concentration semiconductor layer.
With this structure, the low resistance region formed by a polycrystal semiconductor layer has an impurity diffusion coefficient 10 times greater than that of a single crystal semiconductor layer. Diffusion is possible to a lower surface of the polycrystal semiconductor layer at a rate by far faster than the diffusion of from the semiconductor substrate into the semiconductor layer. This makes it possible to easily form a high impurity concentration low resistance region without incurring performance lowering due to the diffusion into a semiconductor device. As a result, a high-performance semiconductor device can be formed without increasing series resistance.
In order to form such a polycrystal-semiconductor low resistance region, for example an insulation film such as SiO
2
is formed over the entire surface of the semiconductor substrate and then patterned. Otherwise, a polycrystal semiconductor film is formed only on an area for a low resistance region by a lift-off technique. Thereafter, a first conductivity type semiconductor layer is epitaxially grown in a desired impurity concentration to a desired thickness, similarly to the conventional. By doing so, a single-crystal semiconductor layer grows matching to the semiconductor-substrate single crystal in an area free of the insulation film or polycrystal semiconductor film whereas no single-crystal semiconductor layer grows on the insulation film or polycrystal semiconductor film but a polycrystal semiconductor layer grows. As a result, a polycrystal semiconductor layer is formed in a part for a low resistance region, simultaneously with epitaxially growing a semiconductor layer. Then, a diffusion region is formed for device formation, and a first conductivity type impurity is diffused also through the area for a low resistance region. The part for a low resistance region is formed by a polycrystal semiconductor layer to have a high diffusion coefficient, and hence cannot be made into a high-concentration impurity diffused region in a short time.


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