Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays
Patent
1993-06-03
1994-04-05
Jackson, Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
257368, 257377, H01L 2702, H01L 2710, H01L 2715
Patent
active
053007905
ABSTRACT:
Disclosed is a semiconductor device having complementary metal insulator semiconductor field-effect transistors (MISFETs) in which a plurality of basic cells having N-channel MOSs and P-channel MOSs are disposed. In this semiconductor device, a sub MISFET is disposed adjacently to a stopper layer in a region adjacent to other basic cell. An element such as a transmission gate composed of a single element can be actualized by use of the sub-MISFET. In the semiconductor device of this invention, a working efficiency thereof is improved. A response velocity of the P-channel MOS can also be improved using the sub-MISFET. A numerical quantity of the basic cells constituting a circuit can be reduced, resulting in a reduction in parasitic capacity. An operating time of the circuit is thereby decreased.
REFERENCES:
patent: 4813017 (1989-03-01), Wong
patent: 4884115 (1989-11-01), Petra et al.
patent: 5008728 (1991-04-01), Yamamura et al.
patent: 5015600 (1991-05-01), Livermore et al.
"Gate-Array Cell to Improve Circuit Density on Chips", IBM Technical Disclosure Bulletin, vol. 32, No. 5B, Oct. 1989, pp. 277-278.
Hirabayashi Yasuhisa
Oguchi Yasuhiro
Okawa Kazuhiko
Sakuda Takashi
Jackson Jerome
Meier Stephen D.
Seiko Epson Corporation
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