Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation
Reexamination Certificate
2000-04-06
2003-09-02
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Electromagnetic or particle radiation
C257S463000, C257S464000, C257S470000, C257S509000, C257S548000, C257S549000
Reexamination Certificate
active
06614087
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor devices having a pin structure, such as diodes, transistors, thyristors, etc.
2. Description of the Background Art
FIGS. 15A
,
15
B show the structure of a conventional pin diode, where
FIG. 15A
shows its cross section and
FIG. 15B
shows its impurity concentration profile. The n
−
-type semiconductor substrate
601
mainly composed of silicon, for example, has a player
602
on one of its main surfaces (on the left in the drawing) and an n
+
layer
603
on the other main surface (on the right in the drawing). For example, the player
602
contains boron or gallium as an impurity and the n
+
layer
603
contains phosphorus, which are obtained by diffusing the impurity to a given depth by thermal treatment. The player
602
and the n
+
layer
603
respectively have an anode electrode
604
and a cathode electrode
605
made of an electrically low resistant metal on the opposite sides to the n
−
-type semiconductor substrate
601
.
The impurity in the n
−
-type semiconductor substrate
601
is almost uniformly distributed with a very small impurity concentration gradient. Since the player
602
and the n
+
layer
603
are formed by applying impurity diffusion to the two main surfaces of the n
−
-type semiconductor substrate
601
, the impurity concentration in each layer has an impurity concentration gradient decreasing toward the n
−
-type semiconductor substrate
601
. For example, the n
+
layer
603
has an impurity concentration gradient of about 4×10
18
cm
−4
. The impurity concentration gradient is given as a value obtained by dividing the difference between a first concentration that is 90% of the maximum value of the impurity concentration in the n
+
layer
603
and a second concentration that is 50% of the maximum value by the distance from the position having the first concentration to the position having the second concentration.
Generally, when a reverse bias is applied to a diode having a pn junction in which a current is flowing in the forward direction by instantaneously switching an external circuit, a large reverse current transiently flows only in a certain period. This is caused by the accumulation of minority carriers in the diode, where the current does not immediately recover in the reverse direction even though it once reaches zero. This reverse current lasts until the minority carriers remaining as excess carriers in the vicinity of the junction decrease below a certain concentration and a depletion layer is established.
When a depletion layer is established, it starts supporting the reverse voltage, and the reverse voltage gradually increases and the reverse current gradually decreases as the depletion layer expands. Then the device voltage becomes steady equal to the voltage applied as the reverse bias and the reverse recovery operation is thus completed. The reverse current flowing in the reverse recovery operation decreases at a current decreasing rate that is determined by the reverse bias value and the inductance of the external circuit.
In the diode shown in
FIG. 15
, a center of carrier recombination is formed by proton irradiation etc. in the vicinity of the pn junction formed by the player
602
and the n
−
-type semiconductor substrate
601
so as to locally shorten the lifetime in the vicinity of the pn junction, thus providing a characteristic with lower forward voltage, smaller reverse recovery current, and high di/dt tolerance. The entirety of the n
−
-type semiconductor substrate
601
is subjected to diffusion of heavy metal, irradiation of electron beam etc. to set the carrier lifetime short.
However, when the reverse bias voltage is high, the applied voltage of the diode rapidly oscillates in the vicinity of completion of the reverse recovery operation, which generates such noise as may cause malfunction of the peripheral electric equipment.
FIG. 16
is a graph showing the time variation in voltage V
A
and current I
A
during the reverse recovery operation of the diode shown in
FIG. 15
, where the time at which the forward bias is switched to the reverse bias by an external circuit is set as zero. As can be seen from the graph, the current of the diode becomes steady zero when about 8 &mgr;s passed after the switching and a voltage oscillation having an amplitude &Dgr;V exceeding 2000 V occurs immediately after that.
It is supposed that such voltage oscillation is caused by resonance of an LCR series circuit formed by the diode and external circuit. The LCR series circuit is formed of a capacitance component C defined by the depletion layer and excess carriers of the diode as parameters, a resistance component R defined by the applied voltage and leakage current of the diode and the recombination current of the excess carriers as parameters, and the inductance component L of the external circuit.
The capacitance component C and the resistance component R of the diode change with time. Especially, the resistance component R rapidly changes when the excess carriers outside the depletion layer disappear. Then the resonance condition of the LCR circuit is reached and the voltage will oscillate as shown in FIG.
16
. When the depletion layer reaches the n
+
layer
603
, the capacitance component C rapidly changes, which may trigger the voltage oscillation.
Such voltage oscillation can occur not only in diodes but also in GCT (gate controlled turn-off) thyristors with rapid switching rate when the voltage rises in turn-off operation. Such voltage oscillation is undesired because it causes such noise as may cause malfunction of the peripheral electric equipment.
For example, Japanese Patent Laying-open No.62-115880 discloses a technique for controlling the semiconductor layer and concentration to improve the waveform in reverse recovery operation.
SUMMARY OF THE INVENTION
A first aspect of the present invention is directed to a semiconductor device comprising a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a semiconductor substrate which is interposed between the first semiconductor layer and the second semiconductor layer and has the second conductivity type with an impurity concentration lower than that in the second semiconductor layer. According to the invention, in the semiconductor device, the second semiconductor layer has an impurity concentration decreasing toward the semiconductor substrate, and the impurity concentration in the second semiconductor layer decreases from 90% of its maximum value to 50% thereof at an impurity concentration gradient equal to or less than 2×10
18
cm
−4
.
Preferably, according to a second aspect of the invention, in the semiconductor device, the maximum value of the impurity concentration in the second semiconductor layer is not more than 5×10
15
cm
−3
.
Preferably, according to a third aspect of the invention, the semiconductor device further comprises a third semiconductor layer of the second conductivity type formed so that the second semiconductor layer is sandwiched between the semiconductor substrate and the third semiconductor layer, and a metal electrode formed so that the third semiconductor layer is sandwiched between the second semiconductor layer and the metal electrode, wherein the third semiconductor layer has a surface impurity concentration of not less than 5×10
17
cm
−3
on the side of the metal electrode.
A fourth aspect of the invention is directed to a semiconductor device comprising a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a semiconductor substrate which is interposed between the first semiconductor layer and the second semiconductor layer and has the second conductivity type with an impurity concentration lower than that in the second semiconductor layer. According to the semiconductor device o
Hirano Noritoshi
Morishita Kazuhiro
Satoh Katsumi
Louie Wai-Sing
Pham Long
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