Semiconductor device

Details Semiconductor device Semiconductor device

1998-11-10

2002-10-29

Talbott, David L. (Department: 2827)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With structure for mounting semiconductor chip to lead frame

66, 66, 66, 66, 66, 66

Reexamination Certificate

active

06472729

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to an improvement applicable to a semiconductor device packaged in a molded package. More specifically, this invention relates to an improvement developed for decreasing the thickness of the semiconductor device packaged in a molded package.
BACKGROUND OF THE INVENTION
A semiconductor device is confined in a package so as to protect the semiconductor device from external hazards including mechanical injury, chemical or fluidic contact, and/or radioactive irradiation. The semiconductor package is classified into a casket type package made of a ceramic et al., and a molded package which is defined as a package made of a plastic material or a material containing a plastic adhesive and ceramic particles formed in a mold covering a semiconductor device chip proper. This invention relates to an improvement applicable to a semiconductor device packaged in a molded package, and particularly in a molded plastic package.
Under the category of a molded package, a quad flat package is available. The quad flat package is defined as a molded package confining a semiconductor device chip having a shape of a quadrilateral and having a plurality of pins extending in the four or quadruple directions therefrom.
Referring to the drawings, the structure of a semiconductor device packaged in a quad flat package available in the prior art will be described below.
Referring to
FIG. 1
, a plan view of a semiconductor device packaged in a quad flat package available in the prior art is illustrated. A semiconductor device chip
50
, in which at least one semiconductor device element is disposed and on which plural bonding pads
51
are arranged, is adhered on a die pad or an island
52
employing a silver paste
53
et al. (See FIG.
2
.). Each of the bonding pads
51
is connected with a respective inner lead
56
a
extending toward an outer lead
56
b,
employing a bonding wire
60
made of Au, Al or Cu, and the die pad or the island
52
extends to four connection bars
54
. The above components, as a whole, are molded in one bulk of a plastic mold
62
of which the external side wall is shown by a solid line.
Referring to
FIG. 2
, which is a cross section of
FIG. 1
taken along line A—A shown in
FIG. 1
, the die pad or the island
52
stands on a different level from the connection bar
54
and the inner lead
56
a,
so that the heights or distances between the top surface of the semiconductor device chip
50
and the top surface of the plastic mold
62
, and between the rear surface of the die pad or the island
52
and the rear surface of the plastic mold
62
are about the same. This causes the flow of a molten resin to become smooth, and cause the shape of the plastic mold
62
to become precisely identical to the designed shape. The object of a bending step of the outer leads
56
b
is to make the step for mounting the semiconductor device easy.
It is well-known that the foregoing semiconductor device packaged in a quad flat package is fabricated, as will be described below.
Referring to
FIG. 3
, a lead frame
58
is prepared. The lead frame
58
is an endless tape made of 42 alloy (an alloy containing 42% of Ni and 58% of Fe), a Cu alloy, stainless steel or a Ni alloy and which has a plurality of die pads or the islands
52
, connection bars
54
, inner leads
56
a,
and outer leads
56
b,
all of which are arranged as shown in the drawing. After the level of the die pads or the islands
52
is slightly lowered as is illustrated in
FIG. 2
, a semiconductor device chip
50
shown in a broken line B is adhered on each of the die pads or islands
52
, and a wire bonding process is conducted to connect each of the bonding pads
51
shown in broken lines and each of the inner leads
56
a
employing bonding wires
60
made of Au, Al or Cu shown in broken lines. Then, a plastic molding process is conducted to form a plastic mold
62
shown in a broken line C. Thereafter, the inner leads
56
a
are discontinued from the outer leads
56
b
along lines D—D. As the final step, the level of the outer leads
56
b
is slightly lowered.
The demand of cellular phones is increasing at a remarkable rate, and it is noted that a large quantity of semiconductor devices packaged in quad flat packages is employed for cellular phones.
At the present technical level, the least (smallest) thickness of the semiconductor devices packaged in quad flat packages is approximately 1.0 mm. This thickness is satisfactory in view of the requirement originated from the cellular phone makers, provided the thickness of the semiconductor device chip is within a range of 150 &mgr;m through 300 &mgr;m. This thickness range of semiconductor device chips can be realized, provided a semiconductor wafer having a diameter of 200 mm is employed.
In the wake of increasingly more serious requirements for a higher grade of integration and for an increasingly larger quantity of pins for a semiconductor device, the external dimension of a semiconductor device packaged in a quad flat package is increasingly larger as well.
Since the production cost of a semiconductor device largely depends on the quantity of semiconductor device chips produced from one semiconductor wafer, which quantity determines the cumulative number of production steps, it is required to employ a semiconductor wafer having a larger diameter such as 300 mm. Such being the case, it is difficult to slice a semiconductor wafer having a variety of thickness of 150 &mgr;m through 300 &mgr;m, due to the problem of warp and cracks. In other words, if a semiconductor wafer having a variety of thickness of 150 &mgr;m through 300 &mgr;m is sliced from a semiconductor ingot having a diameter of 300 mm, the sliced semiconductor wafer readily warps and/or is cracked or broken. As a result, it is difficult to produce a semiconductor wafer having a diameter of 300 mm from a semiconductor ingot having a diameter of 300 mm. In conclusion, if a semiconductor ingot having a diameter of 300 mm is employed, a larger thickness will have to be accepted for a semiconductor wafer to be sliced therefrom.
OBJECT AND SUMMERY OF THE INVENTION
Accordingly, an object of this invention is to provide a semiconductor device packaged in a molded package wherein the finished or molded thickness is in the approximate range of 1.0 mm, despite the thickness range of the semiconductor device chip to be packaged therein is larger than the conventional range of 150 &mgr;m through 300 &mgr;m.
To achieve the foregoing object, a semiconductor device chip packaged in the semiconductor device in accordance with this invention has one or more grooves engraved along the rear surface thereof to allow the grooves to receive one or more connection bars and a die pad or an island, if any, for the purpose to make the total thickness of the semiconductor device chip and the connection bar or bars and the die pad or the island, if any much thinner than the sum of the thickness of the semiconductor device chip and the thickness of the connection bar or bars and the die pad or the island, if any.
More specifically, a semiconductor device in accordance with this invention is provided with:
either a combination of a die pad and connection bars or a plurality of connection bars for supporting a semiconductor device chip further provided with:
at least one semiconductor device element disposed in the semiconductor device chip,
a plurality of bonding pads arranged along sides of a top surface of the semiconductor device chip, and
a groove engraved along a rear surface of the semiconductor device chip to receive the foregoing combination of a die pad and connection bars or the foregoing plurality of connection bars, a plurality of combination of an inner lead and an outer lead, each of the plurality being connected with each of the bonding pads, and
a plastic mold confining the semiconductor device chip supported by the foregoing combination of a die pad and connection bars or the foregoing plurality of connection bars.
In the foregoing semiconductor device, the plurality of connection b

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