Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package

Reexamination Certificate

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Details

C257S713000, C257S714000, C257S783000

Reexamination Certificate

active

06410978

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Filed of the Invention
The present invention relates to a semiconductor device having a base on which a semiconductor chip is mounted.
2. Related Art
In a conventional semiconductor device as disclosed in Japanese Laid-Open Pat. No. H10-22428, a base to which a semiconductor chip is joined, is flat. With the repetitions of turn-on and -off of power in this device during use thereof, the temperature rise is repeated in a part of the base in which the semiconductor chip is joined and, accordingly, a solder layer underneath the semiconductor chip will crack due to fatigue, resulting in a problem of damage to the device. Thus, there is a need to solve the above-mentioned problem.
SUMMARY OF THE INVENTION
The present invention is devised in order to solve the above-mentioned problem inherent to the above-mentioned prior art device and, accordingly, one object of the present invention is to provide a semiconductor device which can reduce strain caused in a solder layer joined to a semiconductor chip so as to be prevented from incurring a fatigue failure.
To that end, according to the present invention, there is provided a semiconductor device comprising a base, and a semiconductor chip mounted on the base, wherein a recess is formed in the base in a part underneath the semiconductor chip.
The present invention will be detailed in the form of a preferred embodiment with reference to the accompanying drawings in which:


REFERENCES:
patent: 4920574 (1990-04-01), Yamamoto et al.
patent: 5613552 (1997-03-01), Osakabe et al.
patent: 6140144 (2000-10-01), Najafi et al.
patent: 10-22428 (1998-01-01), None

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