Active solid-state devices (e.g. – transistors – solid-state diode – Schottky barrier
Reexamination Certificate
2001-03-30
2002-06-11
Meier, Stephen D. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Schottky barrier
C257S481000
Reexamination Certificate
active
06404032
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, in particular, to a semiconductor device having a Schottky barrier diode structure.
2. Description of Related Art
While a Schottky barrier diode (SBD) has a low forward voltage and a high switching speed, the SBD has high reverse leakage current and a low reverse avalanche breakdown voltage as its disadvantage. In a medium or high voltage product of 100 V or higher, in particular, the reverse leakage current needs to be reduced to prevent thermorunaway. The impurity concentration of a drift region needs to be lowered so that a depletion layer is expanded while maintaining a high Schottky barrier height. As a result, forward characteristics are deteriorated.
FIG. 10
shows a structure for reducing leakage current by utilizing a pinch-off effect due to a junction used in a low voltage product. In this figure, an n-type semiconductor layer
2
(hereinafter, referred to as N
−
epi-layer
2
) having a low impurity concentration is formed on an n-type semiconductor substrate
1
(hereinafter, referred to as n-type substrate
1
) having a high impurity concentration by epitaxial growth. P-type semiconductor regions
19
(hereinafter, referred to as P
+
regions
19
) having a high impurity concentration are disposed at prescribed intervals in the main surface of the N
−
epi-layer
2
by diffusion or embedding of polycrystalline silicon in the trench. An anode electrode film
8
contacted to the main surface
6
of the N
−
epi-layer
2
and surfaces
20
of the P
+
regions
19
is formed. The anode electrode film
8
has Schottky contact with the main surface
6
of the N−epi-layer
2
. A cathode electrode film
9
having ohmic contact with the n-type substrate
1
is formed on the other surface of the n-type substrate
1
.
When a reverse voltage is gradually applied to an SBD in
FIG. 10
, depletion layers
23
1
extend from side surfaces
21
,
22
of the P
+
regions
19
into a region
2
a
in the N
−
epi-layer
2
interposed between the adjacent P
+
regions
19
as shown in FIG.
11
. When the reverse voltage is further applied, edges of the depletion layers extending from the side surfaces
21
,
22
of the P
+
regions
19
come into contact with each other (pinch-off) and become one wide depletion layer
23
2
. Therefore, an electric field applied to an interface between the main surface
6
of the N
−
epi-layer
2
and the anode electrode film
8
is relaxed and thereby reverse leakage current can be reduced.
FIG. 12
shows a distribution of electric field strengths in a vertical direction along lines A and B, which are located at the centers of the P
+
region
19
and the N
−
epi-region
2
a
interposed between the P
+
regions
19
, respectively, when a reverse avalanche breakdown voltage is applied to the semiconductor device in a pinch-off state in FIG.
10
. As described above, it is evident from
FIG. 12
that an electric field applied to the interface between the main surface
6
of the N
−
epi-layer
2
and the anode electrode film
8
is relaxed.
However, if the structure shown in
FIG. 10
is applied to a medium or high voltage product of 100 V or higher, an electric field is increased at a pn junction between the bottom
24
of the P
+
region
19
and the N
−
epi-layer
2
, leading to deterioration of the reverse avalanche breakdown voltage. To maintain the reverse avalanche breakdown voltage, the impurity concentration of the N
−
epi-layer
2
needs to be lowered, resulting in deterioration of forward characteristics.
There is also a structure in which only a bottom portion of the P
+
region
19
in
FIG. 10
is formed of a p-type-semiconductor region
25
having a low impurity concentration to relax the electric field at the bottom of the P
+
region
19
as shown in FIG.
13
. However, if the impurity concentration of the p-type semiconductor region
25
becomes lower than a desired concentration, an electric field is concentrated at the bottom of the P
+
region
19
, resulting in deterioration of the reverse avalanche breakdown voltage. If the impurity concentration of the p-type semiconductor region
25
is higher than a desired concentration, an electric field is concentrated at the bottom of the p-type semiconductor region
25
, also resulting in deterioration of the reverse avalanche breakdown voltage.
In this structure, a large region having a low impurity concentration needs to be provided at the bottom to sufficiently relax the electric field. However, if a region having a low impurity concentration is further extended to under the p-type semiconductor region
25
, a thickness of the N
−
0
epi-layer
2
needs to be increased, resulting in deterioration of forward characteristics, which is a trade-off.
When reverse leakage current is reduced and a reverse avalanche breakdown voltage is maintained in a Schottky barrier diode with a medium or high avalanche breakdown voltage of 100 V or higher to prevent thermorunaway, there exists a trade-off that forward characteristics are deteriorated since the impurity concentration of the N
−
epi-layer is lowered or a pinch-off effect due to the junction is utilized.
SUMMARY OF THE INVENTION
In view of the foregoing, an object of the present invention is to provide a semiconductor device such as a Schottky barrier diode or the like in which reverse leakage current is maintained at a conventional level while forward characteristics are greatly improved.
To achieve the above object, the present invention provides a semiconductor device having a first semiconductor layer composed of a semiconductor of a first conductivity type, a second semiconductor layer of the first conductivity type having a lower impurity concentration than that of the first semiconductor layer, trench portions composed of thin trenches having a prescribed width and prescribed intervals therebetween formed in the second semiconductor layer surface, a semiconductor filled material composed of semiconductor of a second conductivity type, which is opposite to the first conductivity type, filled in the trench portions, a Schottky metal electrode formed, on the surface of the second semiconductor layer and the surface of the semiconductor filled material while forming a Schottky junction with the second semiconductor layer and an ohmic contact with the semiconductor filled material, and an ohmic metal electrode formed on the surface of the first semiconductor layer. In this semiconductor device, at least the second semiconductor layer and the semiconductor filled material are constituted by the same semiconductor material. When an avalanche breakdown voltage BV
AK
between the semiconductor filled material and the second semiconductor layer is expressed by
BV
AK
=60×(
E
g
/1.1)
1.5
×(
N
d
/10
16
)
−¾
(where the unit of BV
AK
is V; N
d
represents an impurity concentration of the second semiconductor layer and its unit is cm
−3
; and E
g
represents an energy band gap value of the semiconductor material and its unit is eV), the width W
m
between the semiconductor filled materials adjacent to each other formed in the second semiconductor layers satisfies the following equations (1) and (2):
(where the unit of the width W
m
is cm; W
t
represents a width
W
m
≃
W
t
×
N
d
N
a
(
1
)
of the semiconductor filled material and its unit is cm; and N
a
represents an impurity concentration in the semiconductor filled material and its unit is cm
−3
)
W
m
≦
2
×
ϵ
0
×
ϵ
S
×
(
BV
AK
/
n
)
q
×
N
d
(
2
)
(where &egr;
s
represents a relative permittivity of the semiconductor material; &egr;
0
represents a permittivity in vacuum and is 8.85418×10
−14
F/cm; and q represents an elementary electrical charge and is 1.60218×10
−19
coulomb; and in equation (2), n>1).
The pre
Kitada Mizue
Kunori Shinji
Armstrong Westerman & Hattori, LLP.
Meier Stephen D.
Shindengen Electric Manufacturing Co. Ltd.
LandOfFree
Semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2921160