Semiconductor device

Details Semiconductor device Semiconductor device

2001-07-18

2002-09-03

Flynn, Nathan L. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S773000, C257S758000, C257S734000, C257S737000, C257S777000, C257S778000, C257S666000

Reexamination Certificate

active

06445064

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device which has a plurality of semiconductor packages.
2. Description of the Background Art
An example of a semiconductor device which has a plurality of semiconductor packages is disclosed in, for example, Japanese Patent Laying-open No. 10-116963(1998). A semiconductor device described in this publication is shown in FIG.
13
.
As shown in
FIG. 13
, the semiconductor device has first and second semiconductor packages
22
and
23
that are mounted in an overlapping manner on the mounting substrate
15
. The first and the second semiconductor packages
22
and
23
have, respectively, semiconductor chips (not shown) and external leads
24
and
25
and are electrically connected, respectively, to the lands provided on the mounting substrate
15
via the external leads
24
and
25
.
In this manner, according to the invention described in the above publication, the first and second semiconductor packages
22
and
23
are both directly mounted on the mounting substrate
15
and the above publication does not at all disclose that the second semiconductor package
23
which is in the above position is mounted on the first semiconductor package
22
which is in the below position. That is to say, in the above described publication the idea of mounting a semiconductor package onto another semiconductor package is not, at all, disclosed.
Since the first and the second semiconductor packages
22
and
23
are both directly mounted on the mounting substrate
15
via the external leads
24
and
25
as described above, the following problems arise.
As shown in
FIG. 13
, the external leads
24
of the first semiconductor package
22
which is located in the lower position, extend outward, and, therefore, it becomes necessary to secure the width d for these external leads
24
. That is to say, the size of the first semiconductor package
22
becomes larger in the width direction because of the external leads
24
.
In addition, the external leads
24
raise the resin part of the first semiconductor package
22
off of the mounting substrate
15
and, therefore, the thickness t shown in
FIG. 13
becomes necessary, which results in the size of the first semiconductor package
22
becoming greater in the height direction.
On the other hand, since the external leads
25
of the second semiconductor package
23
are also connected to the mounting substrate
15
, it becomes necessary for these external leads
25
to be arranged outside of the external leads
24
of the first semiconductor package
22
. Therefore, the width of the second semiconductor package
23
becomes larger than the width of the first semiconductor package
22
.
As described above, the size of the first semiconductor package
22
becomes larger and the size of the second semiconductor package
23
becomes, to an even greater extent, larger than the first semiconductor package
22
and, as a result, the problem arises that the size of the semiconductor device becomes larger in both the width direction horizontal direction) and the height direction (vertical direction) of the semiconductor device.
SUMMARY OF THE INVENTION
The present invention is provided to solve the above described problem. It is an object of the present invention to miniaturize a semiconductor device having a plurality of semiconductor packages.
A semiconductor device according to the present invention includes a first semiconductor package that has first lands on the upper surface and second lands on the lower (rear) surface for connection with a mounting substrate and a second semiconductor package that is mounted on the first semiconductor package and that has external conductive parts connected to the first lands.
By providing second lands on the lower surface of the first semiconductor package as described above, the first semiconductor package can be mounted on the mounting substrate without providing the first semiconductor package with external leads. Thereby, the size of the first semiconductor package can be reduced in both the width direction (horizontal direction) and the height direction (vertical direction). In addition, since the second semiconductor package is mounted on the first semiconductor package, it is not necessary to make the width of the second semiconductor package greater than the width of the first semiconductor package and the height of the second semiconductor package can also be reduced. Thereby, the size of the second semiconductor package can also be reduced in both the width direction and the height direction.
The above described first lands are, preferably, arranged on the peripheral part of the first semiconductor package. Thereby, the mounting of the second semiconductor package onto the first semiconductor package can be easily carried out.
The first semiconductor package has a first semiconductor chip, a resin part (molded or sealing part) for molding or sealing the first semiconductor chip and a substrate part, on which the resin part is mounted and which protrudes outward beyond the resin part, wherein the first lands is arranged on the part which protrudes outward beyond the resin part in the substrate part. On the other hand, the second semiconductor package has a second semiconductor chip.
By providing the first semiconductor package with the above described substrate part, the first lands can be arranged on the peripheral part which protrudes outward beyond the resin part in the substrate part. In this manner, the first lands are arranged on the substrate part and, thereby, the formation of the first lands can be easily carried out. In addition, by providing the above described substrate part, the second lands (terminals for external connection) can be arranged in an array form on the entire lower surface of the substrate part and, therefore, a miniaturization of the semiconductor device and an increase of the number of pins become possible.
In the above described substrate part, it is preferable to electrically connect the first and the second packages. Thereby, the second lands (terminals for external connection) of the first and the second semiconductor packages can be shared so that the number of the terminals of the semiconductor device, for external connection, can be reduced.
Third lands that are electrically connected to the first semiconductor chip via wires are provided on said substrate part while the resin part preferably reaches to the substrate part and covers the wires and the third lands.
In this manner, the resin part is formed directly on the substrate part and, thereby, the height of the first semiconductor package can be reduced. In addition, by adopting the above described structure, it becomes unnecessary to provide conductive parts, extending outside of the resin part, on the substrate part.
The above described substrate part may have a recess. In this case, it is preferable to locate the resin part within the recess. Thereby, the resin part can be avoided from protruding from the substrate part so that the mounting of the second semiconductor package onto the first semiconductor package can be carried out more easily.
The second semiconductor package has a die pad for mounting the second semiconductor chip and a molding or sealing resin (molding or sealing part) for molding the second semiconductor chip and the external conductive parts include external leads which extend outward from the side of the molding resin, wherein the external leads, preferably, are bent in the direction toward the first semiconductor package.
In this manner, the external leads are bent in the direction toward the first semiconductor package and, thereby, the second semiconductor package can be easily mounted onto the first semiconductor package even in the case that the resin part of the first semiconductor package protrudes on the above described substrate part.
The above described first semiconductor chip includes a logic device while the second semiconductor chip includes a memory device.
Thereby, it

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