Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device
Reexamination Certificate
2001-02-08
2002-06-18
Nguyen, Viet Q. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Charge transfer device
C257S288000
Reexamination Certificate
active
06407416
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device. Prior Art
Generally, a gate portion of a semiconductor device having dual gate is formed as follows.
First, B ion or BF
2
ion is implanted into polysilicone film so as to form p
+
region and P or As ion is implanted so as to form n
+
region. At this time, a narrow linear region (hereinafter referred to as gate separating region) in which no ion is implanted is secured between the p
+
region and n
+
region to separate both the regions.
Next, for example, WSi
2
(tungsten silicide) is grown on the polysilicone film so as to form gate electrode metal film. The gate electrode metal film is formed across the p
+
region and the n
+
region.
Finally, the p
+
region and n
+
region function as p
+
gate and n
+
gate respectively.
FIG. 2
is a sectional view showing manufacturing process of a dual gate portion in a conventional semiconductor device.
FIG. 3
is a perspective view of that dual gate portion.
As shown in FIG.
2
(
a
), by implanting B or BF
2
ion into the polysilicone film
11
formed on the semiconductor substrate
10
such as silicone substrate, a p
+
region
12
is formed, and by implanting P or As ion, a n
+
region
13
is formed. Next, as shown in FIG.
2
(
b
), a gate electrode metal film
14
is formed of, for example, WSi
2
over the p
+
gate
12
and n
+
gate
13
.
As a result, as shown in
FIG. 3
, a semiconductor device having dual gate is obtained in which the p
+
region
12
and n
+
region
13
function as the p
+
gate
12
and n
+
gate
13
.
However, the conventional semiconductor device has such a fear that the impurity (for example, B or BF
2
) contained in the p
+
gate
12
diffuses into the n
+
gate
13
through the gate electrode metal film
14
or conversely the impurity (for example P or As) contained in the n
+
gate
13
diffuses into the p
+
gate
12
through the gate electrode metal film
14
. If the diffusion of the impurity from one region to the other region is progressed, the characteristic of the semiconductor device is deteriorated considerably.
FIG. 4
shows a path for the impurity implanted into each gate region to pass through the gate electrode metal film
14
to reach the other gate region in the conventional semiconductor device.
Assuming that as shown in
FIG. 4
, the impurity moving from the p
+
gate
12
to the gate electrode metal film
14
reaches the n
+
gate
13
through the gate electrode metal film
14
, the moving distance of the impurity increases or decreases depending on the width of the gate separating region. Likewise, assuming that the impurity moving from the n
+
gate
13
to the gate electrode metal film
14
reaches the p
+
gate
12
through the gate electrode metal film
14
, the moving distance of the impurity also increases or decreases depending on the width of the gate separating region.
The probability that the impurity moving from a gate to the gate electrode metal film
14
may reach the other region increases as the moving distance of the impurity in the gate electrode metal film
14
decreases.
In this point, because the width of the gate separating region in the conventional semiconductor device is small, necessarily, the moving distance of the impurity in the gate electrode metal film
14
is short. Therefore, in the conventional semiconductor device, there is a fear that most of the impurity such as B, BF
2
, P, As implanted into the p
+
gate
12
and n
+
gate
13
may reach the other gate through the gate electrode metal film
14
and diffuse there.
If each impurity implanted into the p
+
gate
12
or n
+
gate
13
moves to the other region and diffuse there, the physical property of the semiconductor composing the p
+
gate
12
and n
+
gate
13
changes, so that the electrical characteristics of the semiconductor device deteriorate remarkably.
SUMMARY OF THE INVENTION
The present invention has been achieved in views of the above described problems and therefore, an object of the invention is to provide a semiconductor device having dual gate wherein the impurity implanted into a gate is prevented from reaching the other gate and diffusing there.
To achieve the above object, according to a first aspect of the invention, there is provided a semiconductor device comprising: a first gate region composed of semiconductor containing a first impurity; a second gate region composed of semiconductor containing a second impurity; and a gate electrode film adjoining the first gate region and the second gate region. In this semiconductor device, a length of the shortest path of plural paths connecting the first gate region to the second gate region, selected in the gate electrode film, is longer than a diffusion distance of the first impurity and a diffusion distance of the second impurity in the gate electrode film.
With such a structure, the first impurity never reaches the second gate region through the gate electrode metal film or the second impurity never reaches the first gate region through the gate electrode metal film.
According to a second aspect of the invention, there is provided a semiconductor device comprising: a first gate region composed of semiconductor containing a first impurity; a second gate region composed of semiconductor containing a second impurity; and a gate electrode film adjoining the first gate region and the second gate region. In this semiconductor device, the gate electrode film has a sectional area smaller than a diameter of crystal grain of material composing the gate electrode film locally in a region not adjoining the first gate region and the second gate region.
With such a structure, the diffusion of the first impurity and second impurity in the gate electrode film is limited remarkably. In other words, the gate electrode film increases so-called diffused resistance in the diffusion of the first impurity and second impurity.
According to a third aspect of the invention, there is provided a semiconductor device comprising: a first gate region composed of semiconductor containing a first impurity; a second gate region composed of semiconductor containing a second impurity; and a gate electrode film adjoining the first gate region and the second gate region. In this semiconductor device, the gate electrode film has plural pits in a region not adjoining the first gate region and the second gate region. Preferably, a gap between a pit and the other pit nearest the pit is smaller than a diameter of crystal grain of material composing the gate electrode film.
With such a structure, the diffusion of the first impurity and second impurity in the gate electrode film is limited remarkably between the respective pits.
According to a fourth aspect of the invention, there is provided a semiconductor device comprising: a first gate region composed of semiconductor containing a first impurity; a second gate region composed of semiconductor containing a second impurity; and a gate electrode film adjoining the first gate region and the second gate region. In this semiconductor device, the gate electrode film has a labyrinth portion for bending plural paths connecting the first gate region to the second gate region, selected in the gate electrode film.
With such a structure, even if the first impurity and second impurity try to move to the second gate region and first gate region respectively through the gate electrode film, they must move at a long distance to pass through the labyrinth portion. Therefore, the first impurity and second impurity move at a diffusion distance possessed thereby before they reach the second gate region and first gate region. Consequently, they cannot reach the second gate region and first gate region.
According to a fifth aspect of the invention, there is provided a semiconductor device comprising: a first gate region composed of semiconductor containing a first impurity; a second gate region
Nguyen Viet Q.
Nhu David
Oki Electric Industry Co. Ltd.
Volentine & Francos, PLLC
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