Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Bidirectional rectifier with control electrode
Reexamination Certificate
2000-07-12
2002-07-30
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Regenerative type switching device
Bidirectional rectifier with control electrode
Reexamination Certificate
active
06426521
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device comprising a semiconductor substrate made of a semiconductor material having one conductivity type and including mutually opposing first and second major surfaces, a first major electrode formed on said first major surface of the semiconductor substrate, a control electrode formed on said first major surface of the semiconductor substrate, a control region of the other conductivity type formed in the semiconductor substrate underneath said control electrode, and a second major electrode formed on the second major surface of the semiconductor substrate, wherein a current flowing between said first major electrode and said second major electrode through a channel formed within the semiconductor substrate is controlled by a control voltage applied to said control electrode.
2. Description of the Related Art
Heretofore, there have been proposed various kinds of semiconductor devices of the kind mentioned above. For instance, gate turnoff thyristors, power bipolar transistors, static, induction transistors and static induction thyristors have been developed.
FIG. 1
is a cross sectional view showing a typical static induction transistor of the buried gate type. N type source regions
2
are formed on one major surface of an n
−
type semiconductor substrate
1
, and source electrodes
3
are formed on the source regions
2
. In the other major surface of the semiconductor substrate
1
is formed a drain region
4
of n or n
+
type and a drain electrode
5
is formed on the drain region
4
.
Under the source regions
2
, there are formed buried gate regions
6
of p
+
type, and these gate regions are connected to a gate electrode
7
formed between adjacent source regions
2
formed in the one major surface of the semiconductor substrate
1
. Under the gate electrode
7
, there is formed a p
+
guard region
8
for realizing a high blocking voltage. When the semiconductor substrate
1
is made of n type semiconductor material, the guard region
8
is formed to have the p conductivity type, and the guard region is connected to the gate regions
6
. Usually, the guard region
8
is formed by a diffused region having a depth not less than 3 &mgr;m such that a sufficiently high blocking voltage can be attained upon cutting-off the current. It should be noted that in order to improve the controllability of the guard region
8
by decreasing a contact resistance with respect to the gate electrode
7
, the guard region
8
has a rather higher surface impurity concentration and has a large width. Therefore, the potential is equal over the whole area under the guard region
8
.
A DC supply source
9
is connected across the source electrode
3
and the drain electrode
5
. For instance, if the transistor is a normally-on type, when zero gate voltage is applied to the gate electrode
7
, a channel is opened and a current flows from the source electrode
3
to the drain electrode
5
through the channel. When a negative gate voltage is applied to the gate electrode
7
with respect to the source, a depletion region spreads from the gate regions
6
and the channel is closed and the current flowing from the source electrode
3
to the drain electrode
5
is cut-off.
In the above mentioned semiconductor device, in the conduction state in which the channel is opened and the current flows between the source regions
2
and the drain region
4
, a potential applied to electrons situating just below the guard region
8
becomes lower and electrons injected from the source region
2
diffuse laterally beyond the channel region. Therefore, a concentration of electrons just below the guard region
8
becomes higher. That is to say, a larger number of electrons exist at an area remotely from the channel. When the device is turned-off, it is required to take out these electrons existing in a region just below the guard region
8
remote from the channel. However, since the electron concentration at that region is rather high, it is impossible to take out or withdraw a large number of electrons within a short time period. In this manner, in the known semiconductor device, the turn-off operation could not be performed at a high speed.
Moreover, during the turn-off operation, electrons existing in the region far from the channel must be taken out, and therefore the turn-off operation within such a region is liable to be delayed and uniform operation could not be attained. As a result, the semiconductor device is liable to be destroyed. This is particularly important for high speed operation.
SUMMARY OF THE INVENTION
The present invention has for its object to provide a novel and useful semiconductor device, in which the turnoff operation can be performed at a high speed and a wider safety operating area can be attained.
According to the invention, a semiconductor device comprises:
a semiconductor substrate made of a semiconductor material having one conductivity typo and including mutually opposing first and second major surfaces;
a first major electrode formed on said first major surface of the semiconductor substrate;
a control electrode formed on said first major surface of the semiconductor substrate;
a control region of the other conductivity type formed in the semiconductor substrate underneath said control electrode; and
a second major electrode formed on the second major surface of the semiconductor substrate;
wherein a current flowing between said first major electrode and said second major electrode trough a channel formed in the semiconductor substrate is controlled by a control voltage applied to said control electrode, and said control region is formed to have a portion whose impurity concentration is reduced in accordance with an increase in a distance from the channel.
In a preferable embodiment of the semiconductor device according to the invention, said control region consists of a first impurity diffused region adjacent to the channel and a second impurity diffused region situated on a side of said first impurity diffused region opposite to the channel. In this case, said first and second impurity diffused regions may be spatially separated from each other or may be partially overlapped with each other. Furthermore, an impurity concentration of said first impurity diffused region may be higher than or substantially equal to that of said second impurity diffused region.
In an embodiment of the semiconductor device according to the invention, both of said first and second impurity diffused regions are connected to said control electrode. In another preferable embodiment said first impurity diffused region is connected to said control electrode and said second impurity diffused region is connected with an insulating layers In another embodiment of the semiconductor device according to the invention, said first impurity diffused region is connected to said control electrode and said second impurity diffused region is connected to a floating potential
According to the invention, said control region may consist of an impurity diffused region having the other conductivity type, and a separate region formed by a part of the semiconductor substrate of the one conductivity type.
According to a further aspect of the invention, a semiconductor device comprises;
a semiconductor substrate made of a semiconductor material having one conductivity type and including mutually opposing first and second major surfaces;
a plurality of first major electrodes aligned on said first major surface of the semiconductor substrate;
a plurality of control electrodes formed on said first major surface of the semiconductor substrate;
a plurality of control regions of the other conductivity type, each of said control regions being formed in the semiconductor substrate under a respective one of said control electrodes; and
a second major electrode formed on the second major surface of the semiconductor substrate;
wherein a current flowing between said first major electrodes and said second m
Abraham Fetsum
Andújar Leonardo
Burr & Brown
NGK Insulators Ltd.
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