Fishing – trapping – and vermin destroying
Patent
1992-02-27
1993-02-02
Wilczewski, Mary
Fishing, trapping, and vermin destroying
437 44, 437247, H01L 21336, H01L 21324
Patent
active
051837706
ABSTRACT:
A method for fabricating a semiconductor device in which diffusion regions are formed in a silicon substrate with use of a gate electrode parts having side walls as a mask, including the steps of: (a) forming a gate electrode on a silicon substrate with a gate oxide interposed therebetween; (b) depositing an insulation film to entirely cover the substrate and the gate electrode, followed by depositing a polysilicon or amorphous silicon layer on the insulation film; (c) forming side walls of SiO.sub.2 on lateral sides of the gate electrode covered with the insulation film and the polysilicon or amorphous silicon layer, followed by ion implantation; and (d) subjecting the resulting substrate to a heat treatment at a medium temperature after removal of the side walls, followed by stacking an interlayer insulator after removal of the polysilicon or amorphous silicon layer, and subjecting the resultant to a heat treatment at a high temperature.
REFERENCES:
patent: 4642878 (1987-02-01), Maeda
patent: 5087582 (1992-02-01), Campbell et al.
Pfiesfer, "LDD MOSFET's Using Disposable Sidewall Spacer Technology", IEEE Electron Device Letters, vol. 9, No. 4, Apr. 1988, pp. 189-192.
Ayukawa Akitsu
Onishi Shigeo
Sharp Kabushiki Kaisha
Wilczewski Mary
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