Semiconductor design support device, semiconductor design...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing

Reexamination Certificate

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C716S104000

Reexamination Certificate

active

07971167

ABSTRACT:
A semiconductor design support device for designing a semiconductor integrated circuit includes a behavioral description, an RTL description, and a latency analyzer. The behavioral description describes an algorithm of processing performed by hardware in a motion level. The RTL description is generated by reading the behavioral description and recognizes a concept including register and clock synchronism peculiar to the hardware. The latency analyzer analyzes a result of a logic simulation performed on the RTL description to calculate a latency in each block representing an operation in a predetermined unit in the behavioral description.

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patent: 2006/0225022 (2006-10-01), Ezaki
patent: 2001-142922 (2001-05-01), None
patent: 2005-63121 (2005-03-01), None
patent: 2006-285865 (2006-10-01), None
U.S. Appl. No. 10/763,255, filed Jan. 26, 2004, Yamada

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