Semiconductor data processing device

Details Semiconductor data processing device Semiconductor data processing device

2006-09-19

2006-09-19

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185130, C365S185290, C365S185330

Reexamination Certificate

active

07110295

ABSTRACT:
An erasing current is distributed to reduce a load of an internal power circuit and to decrease the number of drivers for erase. A semiconductor data processing device has: a memory array having nonvolatile memory cells arrayed in a matrix and divided into a plurality of erase blocks each instructed to be erased together; and a control circuit, wherein the control circuit controls both of two kinds of erasing voltages applied to the nonvolatile memory cell in the erase block instructed to be erased together to select an erase sector from the erase block for performing erase for each erase sector, thereby performing the erase for each erase sector in time division. Time division erase can distribute an erasing current. Two kinds of erasing voltages are used to select the erase sector. No specific drivers need be provided for each erase sector.

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