Semiconductor crystal packaging device

Details Semiconductor crystal packaging device Semiconductor crystal packaging device

1996-03-07

1998-10-20

Foster, Jimmy G.

Special receptacle or package

Holder for a removable electrical component

For a semiconductor wafer

206454, B65D 8586

Patent

active

058233512

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

1. Field of the Invention
This invention relates to semiconductor crystal packaging devices for storing or transporting semiconductor crystals, such as ingots obtained by grinding grown semiconductor single crystals into a cylindrical shape and semiconductor wafers obtained by cutting the ingot to a predetermined thickness.
2. Prior Art
Semiconductor integrated circuits (ICs) are manufactured by polishing the surfaces of a semiconductor wafer obtained by cutting a semiconductor crystal as material to a predetermined thickness, i.e., about 0.5 mm, fabricating an IC pattern including diodes, transistors, MOS-FETs, resistors, capacitors, etc. on the wafer, covering the wafer surface having the IC pattern with a thin insulating film, and mounting lead terminals of a metal film on the insulating film.
The IC manufacture requires transporting ingots or wafers as semiconductor crystal from one step to another or to a different factory. Ingots are transported in a state that they are secured to styrene foam. However, semiconductor wafers which are obtained by cutting crystal to a predetermined thickness are thin even before polishing, and they have to be stored or transported by taking care so that they will not be broken.
In the prior art, as means for storing or transporting wafers an upper packaging device half and a lower packaging device half are provided as different shape moldings of a hard plastic material, and as means for setting wafers in the lower packaging device half a wafer carrier is separately prepared, which has a downwardly convex wafer support having an inner periphery conforming to the wafer diameter. The wafer carrier is secured in position in the lower device half, then wafers are set in a row in the wafer support of the wafer carrier, and then they are accommodated in the upper and lower device halves together with guard members of styrene foam, urethane, etc., which are provided between the device halves and the wafer surfaces and also between the upper device half ceiling inner surface and the wafer edge to protect the wafers from external shocks.
In a related technique (shown in Japanese Patent Publication No. Showa 55-9349), wafers are accommodated in an upper and a lower device half having different shapes such that they are pushed against the lower device half by the upper device half via a wafer carrier, which is made of a hard but elastically deformable plastic material, and in which the wafers are set upright and in a row at a predetermined interval.
In another related technique (shown in Japanese Patent Laid-Open Publication No. Showa 60-193877), in an upper and a lower device half having different shapes a cage having ribs provided at a predetermined interval for inserting wafers between adjacent ones of these ribs, is provided, and wafers are accommodated such that they are pushed against the cage by the upper device half via a retainer member disposed over the cage.
In a further related technique (shown in Japanese Patent Laid-Open Publication No. Heisei 2-20042), in an upper and a lower device half having different shapes a wafer carrier having ribs provided at a predetermined interval for inserting wafers between adjacent ones of these ribs, is provided, and wafers are accommodated such that they are pushed by a wafer support spring integral with the upper device half.
In the above prior art techniques, grown semiconductor single crystals and ingots obtained by cylindrically polishing the crystals are packed in cardboard by securing the semiconductor product therein with styrol foam or like material.
A problem in the prior art techniques is that the upper and lower packaging device halves, which are assembled together as mean of accommodating semiconductor wafers either after cutting or after polishing for storage or transport, have different shapes. These device halves are designed separately and, as a whole, they require at least two different dies, which is undesired in view of economy.
In another aspect, the packaging device requires a certain

REFERENCES:
patent: 4043451 (1977-08-01), Johnson
patent: 4135625 (1979-01-01), Merrill
patent: 4173286 (1979-11-01), Stanko
patent: 4219693 (1980-08-01), French
patent: 4555024 (1985-11-01), Voss et al.
patent: 4588086 (1986-05-01), Coe
patent: 4779732 (1988-10-01), Boehm et al.
patent: 4826055 (1989-05-01), Tajima et al.
patent: 4966284 (1990-10-01), Gregerson et al.
patent: 5054418 (1991-10-01), Thompson et al.

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