Semiconductor device manufacturing: process – Making passive device – Trench capacitor
Reexamination Certificate
2007-06-05
2007-06-05
Estrada, Michelle (Department: 2823)
Semiconductor device manufacturing: process
Making passive device
Trench capacitor
C438S171000, C438S190000, C438S210000, C438S238000, C438S243000, C438S329000, C438S396000, C257S068000, C257S071000, C257S296000, C257S906000, C257SE21646, C257SE27084
Reexamination Certificate
active
11215243
ABSTRACT:
The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.
REFERENCES:
patent: 5918122 (1999-06-01), Parekh et al.
patent: 6083831 (2000-07-01), Dennison
patent: 6140172 (2000-10-01), Parekh
patent: 6180485 (2001-01-01), Parekh et al.
patent: 6207523 (2001-03-01), Parekh et al.
patent: 6214727 (2001-04-01), Parekh
patent: 6228738 (2001-05-01), Parekh et al.
patent: 6232176 (2001-05-01), Parekh et al.
patent: 6238971 (2001-05-01), Parekh et al.
patent: 7125781 (2006-10-01), Manning et al.
patent: 2001/0021552 (2001-09-01), Parekh et al.
patent: 2003/0132429 (2003-07-01), Kim et al.
patent: 2005/0051822 (2005-03-01), Manning
patent: 2005/0054159 (2005-03-01), Manning et al.
patent: 2005/0287780 (2005-12-01), Manning et al.
“A Mechanically Enhanced Storage node for virtually unlimited Height(MESH)Capacitor Aiming at sub 70nm DRAMs”, D.H. Kim, et al; 2004 IEEE; pp. 3.4.1-3.4.4.
Graettinger Thomas M.
Manning H. Montgomery
Estrada Michelle
Tobergte Nicholas J.
LandOfFree
Semiconductor constructions, and methods of forming... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor constructions, and methods of forming..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor constructions, and methods of forming... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3843393