Semiconductor component with multi-level interconnect system and

Details Semiconductor component with multi-level interconnect system and Semiconductor component with multi-level interconnect system and

1996-08-26

1998-08-25

Daadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

H01L 2348, H01L 2352, H01L 2940

Patent

active

057985685

ABSTRACT:
A method of manufacturing a semiconductor component with a multi-level interconnect system includes providing a substrate (11), fabricating a device (12) in the substrate (11), forming an interconnect layer (15) over the substrate (11), depositing a dielectric layer (20) over the interconnect layer (15), depositing a separate interconnect layer (21) over the dielectric layer (20), etching a via (31) in the separate interconnect layer (21) and in the dielectric layer (20), and depositing a different interconnect layer (40) over the separate interconnect layer (21) and in the via (31) wherein the another interconnect layer (40) electrically couples the interconnect layer (15) and the separate interconnect layer (21).

REFERENCES:
patent: 4541893 (1985-09-01), Knight
patent: 4656732 (1987-04-01), Teng et al.
patent: 4977105 (1990-12-01), Okamoto et al.
patent: 5243221 (1993-09-01), Ryan et al.
patent: 5281850 (1994-01-01), Kanamori
patent: 5294837 (1994-03-01), Takase et al.
patent: 5374592 (1994-12-01), MacNaughton et al.

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