Semiconductor component having test pads and method and...

Semiconductor device manufacturing: process – With measuring or testing

Reexamination Certificate

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C438S015000, C438S018000

Reexamination Certificate

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10842770

ABSTRACT:
A semiconductor component having test pads and a method and apparatus for testing the same is described. In an example, an un-bumped substrate is obtained having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. In another example, a substrate is fabricated having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is in electrical communication with a respective one of the bond pads. The substrate is tested using the plurality of test pads. An insulating layer is formed over the plurality of test pads.

REFERENCES:
patent: 5506499 (1996-04-01), Puar
patent: 5554940 (1996-09-01), Hubacher
patent: 5635424 (1997-06-01), Rostoker et al.
patent: 5923047 (1999-07-01), Chia et al.
patent: 6380555 (2002-04-01), Hembree et al.
patent: 6617181 (2003-09-01), Wright et al.
patent: 6630837 (2003-10-01), Wark
patent: 6869809 (2005-03-01), Yu et al.
U.S. Appl. No. 10/842,756, filed May 11, 2004, Eghan et al.

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