Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including high voltage or high power devices isolated from...
Reexamination Certificate
2002-04-01
2004-06-08
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including high voltage or high power devices isolated from...
C257S288000, C257S409000, C438S218000, C438S294000
Reexamination Certificate
active
06747332
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to electronics, in general, and to semiconductor components and methods of manufacture, in particular.
BACKGROUND OF THE INVENTION
In applications such as Liquid Crystal Display (LCD) display drivers, the source, body, gate, and drain terminals of a Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) must be able to sustain high voltages of fifteen volts or greater relative to each other and relative to the semiconductor substrate in which the MOSFET is formed. One skilled in the art will understand that FIG.
1
. illustrates a cross-sectional view of a MOSFET
100
that is suitable for high voltage applications involving voltages greater than approximately fifteen volts. MOSFET
100
is manufactured using an older semiconductor technology that uses a semiconductor substrate
110
that does not include an epitaxial layer. Semiconductor substrate
110
has an P-type conductivity with a low doping concentration referred to as P−.
MOSFET
100
is bi-directional and symmetric and is an N-type MOSFET or NMOS transistor. One skilled in the art will understand that appropriate changes can be made to the description of MOSFET
100
if MOSFET
100
were a P-type MOSFET or PMOS transistor. MOSFET
100
includes a gate electrode
160
, a gate oxide
170
, and field oxide regions
180
and
190
. MOSFET
100
also includes four deep diffused wells
120
,
130
,
140
, and
150
to isolate MOSFET
100
from other transistors in semiconductor substrate
110
. Wells
120
,
130
, and
150
have an N-type conductivity, and well
140
has a P-type conductivity. The deep-diffused wells, however, are not compatible with modern deep sub-micron device technologies because of the imprecision of the diffusion process.
One skilled in the art will understand that
FIG. 2
illustrates a cross-sectional view of a MOSFET
200
that is also suitable for high voltage applications. MOSFET
200
is manufactured using a more modern deep-submicron semiconductor technology that uses a semiconductor substrate
210
that includes a support substrate
211
and an epitaxial layer
212
. Support substrate
211
has a P-type conductivity and has a very high doping concentration referred to as P+ to minimize a latch-up problem during operation of MOSFET
200
. Epitaxial layer
212
has a P− conductivity.
MOSFET
200
is bi-directional and symmetric and is an N-type MOSFET or NMOS transistor. One skilled in the art will understand that appropriate changes can be made to the description of MOSFET
200
if MOSFET
200
were a P-type MOSFET or PMOS transistor. MOSFET
200
includes a gate electrode
260
and field oxide regions
280
and
290
. MOSFET
200
is formed in epitaxial layer
212
, but epitaxial layer
212
is too thin to contain the multiple deep diffused wells described earlier for the older semiconductor technology in FIG.
1
. Instead, MOSFET
200
in
FIG. 2
includes more shallow N-type conductivity wells
220
and
230
.
To permit MOSFET
200
to operate under high voltage conditions, MOSFET
200
typically includes an extra P-type region
240
. MOSFET
200
also typically includes a gate oxide
270
that is thicker than that required for gate oxide
170
of MOSFET
100
in
FIG. 1
to provide the high voltage compatibility for MOSFET
200
in FIG.
2
. Gate oxide
270
may require a thickness of approximately forty nanometers in order to support a twelve volt breakdown voltage.
This thicker gate oxide, however, is approximately four times the thickness of gate oxides for typical MOSFETs. Therefore, a new process module must be inserted into the manufacturing process to be able to integrate MOSFET
200
into an integrated circuit with other MOSFETs. This new process module increases the cost, complexity, and cycle time for the manufacturing process of the semiconductor component containing MOSFET
200
.
The thicker gate oxide also requires a larger gate-to-source operating voltage, approximately twelve volts, to fully drive MOSFET
200
. Therefore, a higher voltage power supply must also be used for the integrated circuit containing MOSFET
200
. This higher voltage power supply increases the application costs and also decreases the application convenience for MOSFET
200
.
Furthermore, the channel region underneath the thicker gate oxide in MOSFET
200
is not isolated from, but is electrically shorted to, other portions of semiconductor substrate
210
such as support substrate
211
. Therefore, the electrical performance of MOSFET
200
will be degraded by the other devices in semiconductor substrate
210
. Additionally, at least the gate terminal of MOSFET
200
may not be capable of sustaining high voltages of fifteen volts or greater relative to support substrate
211
.
Accordingly, a need exists for a semiconductor component suitable for use in high voltage applications, particularly where a semiconductor device in the semiconductor component has electrodes that are capable of sustaining high voltages relative to each other. A need also exists for a method of manufacturing the semiconductor component.
REFERENCES:
patent: 5475335 (1995-12-01), Merrill et al.
patent: 5885876 (1999-03-01), Dennen
de Fresart Edouard
Parris Patrice
Tam Pak
Bryan Cave LLP
Motorola Inc.
Wilson Scott R.
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