Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Reexamination Certificate
2007-01-16
2007-01-16
Baumeister, G. William (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
C257SE27047
Reexamination Certificate
active
10770629
ABSTRACT:
A semiconductor component having a tuned variable resistance resistor and a method for manufacturing the tuned variable resistance resistor. A semiconductor process for manufacturing a semiconductor component is selected. For the selected process, the tuned variable resistance resistor is characterized to determine the maximum stress current as a function of the width of the tuned variable resistance resistor. Then, for a given width and maximum stress current, the voltages across the resistors are characterized as a function of length. A tuned variable resistance resistor having a length and width capable of sustaining a predetermined maximum stress current is integrated into a semiconductor component. The semiconductor component may include protection circuitry designed in accordance with the Human Body Model, the Charge Device Model, or both.
REFERENCES:
patent: 4560583 (1985-12-01), Moksvold
patent: 4989057 (1991-01-01), Lu
patent: 4990802 (1991-02-01), Smooha
patent: 5181092 (1993-01-01), Atsumi
patent: 5218222 (1993-06-01), Roberts
patent: 5266156 (1993-11-01), Nasr
patent: 5485095 (1996-01-01), Bertsch et al.
patent: 5717559 (1998-02-01), Narita
patent: 5719733 (1998-02-01), Wei et al.
patent: 5801065 (1998-09-01), Rizvi et al.
patent: 5901022 (1999-05-01), Ker
patent: 6137338 (2000-10-01), Marum et al.
patent: 6249413 (2001-06-01), Duvvury
patent: 6340833 (2002-01-01), Liu et al.
patent: 6437407 (2002-08-01), Ker et al.
patent: 6566717 (2003-05-01), Jung
patent: 6621404 (2003-09-01), Banerjee
patent: 6732422 (2004-05-01), Thei et al.
patent: 2002/0039825 (2002-04-01), Kawazoe et al.
patent: 2002/0090787 (2002-07-01), Chan et al.
patent: 2002/0115259 (2002-08-01), Maimon et al.
patent: 2003/0123207 (2003-07-01), Toyoshima
patent: 2004/0164355 (2004-08-01), Litwin et al.
patent: 05090521 (1993-04-01), None
patent: WO003021737 (2003-03-01), None
Jiju Antony, Design of Experiment, 2003, Butterworth-Heinemann, Chapters 1-2.
P. Leroux and M. Steyaert, High-performance 5.2 Ghz LNA with on-chip inductor to provide ESD protection, Electronics Letters, Mar. 29, 2001, vol. 37, No. 7, pp. 467-469.
C. Richier, P. Salome, et al., Investigation on Different ESD Protection Strategies Devoted to 3.3 V RF Applications (2 Ghz) in a 0.18 um CMOS Process, EOS/ESD Symposium, pp. 251-259.
Beebe Stephen G.
Salman Akram A.
Advanced Micro Devices , Inc.
Baumeister G. William
Farjami & Farjami LLP
Reames Matthew L.
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