Semiconductor CMOS static RAM with overlapping thin film transis

Details Semiconductor CMOS static RAM with overlapping thin film transis Semiconductor CMOS static RAM with overlapping thin film transis

1991-02-19

1994-09-27

Limanek, Robert

Active solid-state devices (e.g., transistors, solid-state diode

Non-single crystal, or recrystallized, semiconductor...

Field effect device in non-single crystal, or...

257351, 257390, 257903, H01L 2910

Patent

active

053509331

ABSTRACT:
A pair of load transistors of a flip-flop circuit constituting a memory cell consist of thin film transistors, and channel regions of the pair of load transistors overlap drain regions of the transistors through a gate insulating film. For this reason, a channel length of the load transistor can be sufficiently increased, and a leakage current of the load transistor can be reduced.

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patent: 4980732 (1990-12-01), Okazawa
patent: 5083190 (1992-01-01), Pfiester
patent: 5095347 (1992-03-01), Kirsch
patent: 5132771 (1992-07-01), Yamanaka et al.
patent: 5134581 (1992-07-01), Ishibashi et al.
patent: 5281828 (1994-01-01), Muragishi
Garnache, "Complimentary (sic) FET Memory Cell" IBM TDB vol. 18, No. 12, May 1976.

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