Semiconductor circuit using feedback to latch multilevel data

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

327363, 326 60, H03K 508

Patent

active

059735350

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates to a semiconductor circuit, and in particular, relates to a highly functional semiconductor integrated circuit which is capable of converting analog data into multilevel data and storing these data in a static manner.


BACKGROUND

The signal processing of video camera images and the like has conventionally been accomplished by means of converting an enormous amount of analog data fetched by an image sensor into a digital format, and conducting processing by means of a digital computer.
When such a method is employed in concert with an increase in the number of pixels, the amount of data to be processed increases greatly, and it becomes impossible to conduct signal processing in real time. It is thus necessary to conduct signal processing completely in parallel at a hardware level, whether the inputted data is in an analog or multilevel format; however, in order to accomplish this, a circuit is rehired to temporarily store the analog or multilevel data incorporated by the sensor or data representing intermediate calculations.
However, in order to realize circuitry such as that conventionally known, a large number of elements was required, and furthermore, because the addition of the multilevel data was accomplished by means of the addition of electrical current, the amount of power consumed was large and it was thus difficult to conduct signal processing in a completely parallel format at the hardware level among the data fetched by the pixel sensors.
It is an object of the present invention to provide a semiconductor circuit which is capable of fetching and storing analog or multilevel data using simple circuitry.


DISCLOSURE OF THE INVENTION

The semiconductor circuit in accordance with the present invention is characterized in that a first signal which is inputted is converted into a second signal comprising a predetermined multilevel signal and is outputted, and this second signal is then fed back to the circuit.
The circuit is characterized in comprising a first circuit, which converts the first signal into a signal group comprising multiple quantized signals, and a second circuit which converts this signal group into the second signal.
Furthermore, the first circuit and/or the second circuit are characterized in constituting 1 or more neuron MOS transistors, having: a semiconductor region of a first conductivity type provided on a substrate, source and drain regions of an opposite conductivity type provided on this region, a floating gate electrode which is in a potentially floating state and is provided via an insulating film at a region separating the source and drain regions, and a plurality of input gates which are capacitively coupled with the floating gate electrode via an insulating film.
A first signal which is inputted is converted into a second signal comprising a predetermined multilevel signal, and the second signal is fed back to the circuit, and thereby, it is possible to construct a multilevel signal memory.
For example, by means of constituting the circuit with a first circuit which converts a first signal which is inputted into a signal group comprising multiple quantized signals, and a second circuit which converts this signal group into a second signal comprising a multilevel signal, and by feeding back the second signal to the input part of the first circuit, it is possible to construct a circuit which converts a first signal inputted in an analog or multilevel format into a predetermined multilevel signal (second signal) and latches this.
Furthermore, by means of constituting the first circuit or second circuit using neuron MOS, it is possible to greatly reduce the number of elements and power consumption required.


BRIEF DESCRIPTION OF THE DIAGRAMS

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.
FIG. 2 is a graph showing the relationship between the input and the output of the first circuit.
FIG. 3 is a circuit diagram showing a CMOS switch which is preferably employed in the first circuit.
FIG. 4

REFERENCES:
patent: 4814644 (1989-03-01), Yamakawa
patent: 4821286 (1989-04-01), Graczyk et al.
patent: 4823028 (1989-04-01), Lloyd
patent: 5132575 (1992-07-01), Chern

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor circuit using feedback to latch multilevel data does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor circuit using feedback to latch multilevel data, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor circuit using feedback to latch multilevel data will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-768978

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.