Semiconductor circuit, operating method for the same, and...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

Reexamination Certificate

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C327S276000, C327S261000

Reexamination Certificate

active

07394302

ABSTRACT:
A semiconductor circuit allows a timing adjustment after detailed routing without rearrangement and rerouting, an adjustment of delay variance due to process variation, and a delay adjustment even after chip formation using a primitive cell with a built-in means for adjusting delay time. The circuit connected between an input pad and an output pad, an operating method for the same, and a delay time control system circuit, which externally adjusts delay time of a plurality of control terminal-equipped/variable capacitance embedded buffers configures a semiconductor circuit. The structure includes: a first buffer connected between the input pad and the output pad; and a plurality of capacitances connectable in parallel between a fixed potential and a current flowing path, which is positioned between the first buffer and the output pad, and that controls connection between each of the plurality of capacitances and the output pad.

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patent: 6470484 (2002-10-01), Day et al.
patent: 6510542 (2003-01-01), Kojima
patent: 6598212 (2003-07-01), Okayasu
patent: 6654214 (2003-11-01), Karanicolas
patent: 6754877 (2004-06-01), Srinivasan
patent: 6785875 (2004-08-01), Beerel et al.
patent: 2004/0243957 (2004-12-01), Mandry
patent: 2005/0093604 (2005-05-01), Kang et al.
patent: 2001-111391 (2001-04-01), None
patent: 2001-230324 (2001-08-01), None

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