Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2000-09-06
2004-04-27
Mai, Tan V. (Department: 2124)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S493000
Reexamination Certificate
active
06728745
ABSTRACT:
TECHNICAL FIELD
This invention relates to a semiconductor circuit for arithmetic processing and an arithmetic processing method, and particularly to a semiconductor circuit for arithmetic processing and an arithmetic processing method using information processing and device control.
BACKGROUND ART
In the field of information processing etc., semiconductor circuits are responsible for numerical computation and logical computation. Accordingly, semiconductor circuits are extremely important in the field of information processing etc., and various circuits are currently being designed.
In semiconductor circuits, first of all information is divided into analog information and digital information, but it is necessary to perform arithmetic processing after converting all information to digital information in order to carry out computation maintaining high reliability. For this reason, it is a general rule in the present invention that analog information is converted to multi-value information or a digital signal and then arithmetic processing is carried out.
Information that has been converted to digital becomes numerical information, and depending on the range of the numerical information obtained data having a bit width of 8 bits, 16 bits, 32 bits, or currently 64 bits or 128 bits, is used. Circuit types for processing this type of multi-bit information are generally classified into bit parallel circuits and bit serial circuits.
Bit parallel processing involves providing a calculating circuit for all bits, inputting data sequentially in bit units from the lower order bit, and performing calculation processing. It is no exaggeration to say that as well as microprocessors, almost all current processors adopt this method.
Bit serial processing is a method of computational processing where data is input in bit units sequentially from lower order bits every computation time unit (normally a clock). With this method it is possible to design computation circuits for 1 bit, and has the advantage that surface area is small. However, since this method to carries out processing from a lower order digit, there is the disadvantage that it takes am extremely long time to acquire data of the most significant digit.
If it could be said that either the high order digit or the low order has more important information, then normally the high order has the most important information. That is why the highest order digit is called the Most Significant Digit. However, carrying out the conventional bit serial processing from the low order digit causes a “carry signal” problem in addition computation etc.
In a carry signal and addition result generated by addition computation, first of all the digit (decimal number) as the first placed number is different, and it is not possible to handle in the same level.
Also, in the worst case there is a possibility of a carry signal generated from the least significant digit being propagated to the most significant digit, and it is necessary to determine a solution and a carry signal from the least significant digit. Computational processing from an upper digit is impossible in the present invention without solving this carry propagation problem.
Naturally, with computation that is not equivalent to a carry signal, such as a simple size judgement circuit, for example, there are arithmetic processing semiconductor circuits including comparative judgment from an upper digit. However, there are no inventions for arithmetic processing from an upper order digit including arithmetic processing so as to include a carry signal.
The object of the present invention is to provide an semiconductor circuit for arithmetic processing and an arithmetic processing method that can carry out arithmetic processing from an upper digit sequentially in bit serial format, with priority given to an upper order digit containing more important information.
In order to achieve the above described object, a first aspect of the present invention solves the problem of carry signal overflow in addition computation, a second aspect of the present invention solves the problem of carry propagation, a third aspect of the present invention solves the problem of computation speed for bit serial format, and a fourth aspect of the present invention makes it possible to perform complicated computation and processing, other than multiplication, from an upper digit.
DISCLOSURE OF THE INVENTION
Computation that is a subject of the present invention is computation from an upper digit on data bit serially input every time step (computation time units), and resolves a generated carry signal using various means, and realizes applications uses as a result.
A semiconductor circuit for arithmetic processing of the present invention is a semiconductor circuit receiving as input at least one numerical data item comprised of a plurality of digits, input sequentially one digit per computing time unit from an upper digit of the numerical data, and is provided with a computing unit for computing of the input data. The computing unit comprises a computing circuit for computing input digit data within a computing time unit, and outputting a computation result representing a result obtained by the computation to generate a carry using the computation and outputting carry data representing this carry, and delay means for delaying the computational result from the computing circuit by only a single computing time unit. Using this delay, the first aspect of the present invention resolves the problem of carry signal overflow without the need for specialized handling of the carry signal as a carry signal.
The problem of carry propagation in the semiconductor circuit for arithmetic processing of the present invention can be solved with the second aspect of the present invention by any of three methods.
First of all, using a method of representing output data using a redundant number system. Secondly, here is a method comprising first decision means for deciding whether or not the carry data output to an upper digit by computation of a particular digit is changed using carry data generated by computation for a lower digit than that digit, output means for indicating the fact that there is no change to carry data to an upper order side, when tho decision result from the first decision means indicates that there is no dependency on carry data output from the lower order digit, input means for holding lower order side carry data, when the decision result from the first decision means indicates that there is dependency on carry data output from the lower order digit, and changing means for changing the computational result in response to lower order digit carry data from the lower order side. Thirdly, there is a method comprising computing means for sequentially carrying out computation every computing time unit from an upper digit side and computing a maximum value and a minimum value for computational results acquired at the lower digit than an input digit, and comparison means for comparing at least one of the maximum value and the minimum value computed by the computing means with data of another digit.
The third aspect of the present invention is a semiconductor circuit for arithmetic processing provided with decision means for comparing and deciding, every computing time unit from an upper digit, computational results output sequentially every computing time unit from the upper digit, and when the authenticity of the decision result of the decision means has been confirmed arithmetic processing including comparison and decision for remaining lower order digits is omitted.
A fourth aspect of the semiconductor circuit for arithmetic, processing of the present invention receives one of two data items as a multiplicand and the other as a multiplier, and sequentially inputs the multiplier every computing time unit from the upper order digit, and outputs the result of multiplying the two data items sequentially every computing time unit from an upper order digit, and comprises storage means for storing the multiplier while shifting it
Fujibayashi Masanori
Imai Makoto
Kotani Koji
Nitta Takahisa
Nozawa Toshiyuki
Knuth Randall J.
Mai Tan V.
Ohmi Tadahiro
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