Semiconductor circuit for a DC motor

Details Semiconductor circuit for a DC motor Semiconductor circuit for a DC motor

1994-09-13

1996-07-16

Shoop, Jr., William M.

Electricity: motive power systems

Limitation of motor load, current, torque or force

318254, 318138, H01R 3946

Patent

active

055370152

ABSTRACT:
It is an object of the invention to provide a transistorized full-bridge driving circuit for an electronically commutated collectorless dc motor, in which burnout of the pnp transistors from overvoltage is avoided. This is accomplished by an arrangement with a collectorless dc motor (19) commutated by a semiconductor circuit, with a rectified-current intermediate circuit (13,14) supplied via a rectifier (11) from an AC current network, the intermediate circuit having an input to which is applied a fluctuating rectified current with predetermined maximum values, with a transistor (12, 112) located between the rectifier and the collectorless dc motor, the transistor being driven as a variable resistor, and with limiting means (25-27), for limiting the voltage at the control input of this transistor (12, 112) to a value smaller than the predetermined maximal value of the fluctuating rectified voltage and which control voltage falls within the voltage-tolerance range of the semiconductor driving circuit of the collectorless dc motor. The use of the limiting means, in combination with the transistor operated as a variable resistor, limits the voltage in the rectified-current intermediate circuit to an upper value, e.g. 270 V, so that standard commercial pnp- and npn-transistors can be used for the semiconductor driving circuit for commutation of the collectorless dc motor, and in this manner the semiconductor circuit is protected from overvoltage conditions. In the transistor which is driven as a variable resistor, corresponding losses do arise, but one avoids losses which would otherwise occur in a corresponding low-voltage power supply, so that overall a very good operating level results.

REFERENCES:
patent: 3873897 (1975-03-01), Mueller
patent: 4247808 (1981-01-01), Hanner
patent: 4274037 (1981-06-01), Soeda
patent: 4329630 (1982-05-01), Park
patent: 4449079 (1984-05-01), Erdman
patent: 4588933 (1986-05-01), Sun
patent: 5029229 (1991-07-01), Nelson, III
patent: 5059766 (1991-10-01), Gilliland
patent: 5267344 (1993-11-01), Nelson, III
Engl. abstract of Shigeizumi/Toshiba 58-75492-A, pub. May 1983.
Engl. abstract of Satou/Aichi Denki 60-51490-A, pub. Mar. 1985.
Engl. abstract of Hirose/Yasukawa 60-200,794-A, pub. Oct. 1985.
Engl. abstract of Nunokawa/Sanyo 63-117,684-A, pub. May 1988.
Rolf Mueller, "Zweipulsige kollektorlose Gleichstrom motoren," [Two-pulse collector-less direct current motors], in ASR Digest fuer angewandte Antriebstechnik, 1977, # 1-2, pp. 27-31.
SGS-Thomson Microelectronics, "STP4N40FI N-Channel Enhancement Mode Power MOS Transistor," datasheet May 1992, pp. 697-703.

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