Semiconductor circuit device for preventing an output of a bista

Details Semiconductor circuit device for preventing an output of a bista Semiconductor circuit device for preventing an output of a bista

1988-03-08

1989-07-18

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307279, 3072721, 307585, H03K 329, H03K 326, H03K 3284, H03K 17687

Patent

active

048496537

ABSTRACT:
There is an R-S flip-flop circuit having a threshold voltage of a first value. An input terminal of a Schmitt trigger circuit having a second threshold voltage of a lower value than the first value and a third threshold voltage of a higher value than the first value is connected to an output terminal of the R-S flip-flop circuit.

REFERENCES:
patent: 3953744 (1976-04-01), Kawagoe
Osborn, "Schmitt Trigger Prevents Clock Train Overlap", Electronics, Jul. 3, 1972, vol. 45, No. 14.
Neil R. Stewart, "Hysteresis Memory Arrangement", RCA TN No. 686, Jan. 1967.
Reese et al., "A 4K.times.8 Dynamic RAM with Self-Refresh," IEEE Journal of Solid-State Circuits, vol. SC-16, No. 5, pp. 479-487, Oct. 1981.
Kung et al., "An 8K.times.8 Dynamic RAM with Self-Refresh," IEEE Journal of Solid-State Circuits, vol. SC-17, No. 5, pp. 863-871, Oct. 1982.

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