Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices
Patent
1996-08-12
1998-07-21
Young, Brian K.
Coded data generation or conversion
Analog to or from digital conversion
With particular solid state devices
H03M 112
Patent
active
057840180
DESCRIPTION:
BRIEF SUMMARY
TECHNOLOGICAL FIELD
The present invention relates to a semiconductor circuit, and more particularly provides a highly functional semiconductor integrated circuit which is capable of quantizing analog data, converting these data into multilevel data, and storing these in a static manner, and wherein, furthermore, the number of quantized levels can be set to a freely desired number by means of an external signal.
BACKGROUND ART
In image signal processing such as that of video cameras and the like, conventionally, a large amount of analog data inputted via image sensors was individually converted into a digital format datum by datum, and processing was conducted by means of a digital computer.
When this method was employed, in concert with an expansion in the number of pixels, the number of data to be processed increased, and it became impossible to conduct signal processing in real time.
It was thus necessary to conduct signal processing in a completely parallel manner at the hardware level, dealing with the inputted data in an analog or multilevel format; however, in order to do this, circuitry was necessary for the temporary storage of analog or multilevel data acquired by the sensors, as well as the data in the process of computation.
However, in order to realize such circuitry a very large number of elements were conventionally required, and furthermore, as the addition of the multilevels was conducted by means of electrical current addition, a large amount of power was consumed, and it was difficult to conduct completely parallel signal processing at the hardware level which incorporated all the pixel sensors.
It is an object of the present invention to provide a semiconductor circuit which is capable of accepting and storing analog or multilevel data using simple circuitry. Furthermore, it is an object of the present invention to provide a multilevel memory in which the number of quantized levels can be freely altered by means of an external signal.
DISCLOSURE OF THE INVENTION
The semiconductor circuit of the present invention is a semiconductor circuit comprising a first circuit which converts first signals into a signal group comprising a plurality of quantized signals, a second circuit which converts the signal group into second multilevel signals, and a mechanism for feeding back the second signals to the first circuit as first signals; characterized in that a mechanism for electrically separating at least one signal included in the signal group from the input of the second circuit, and a mechanism for feeding back the second signals as the input of the second circuit instead of at least one signal included in the signal group which was electrically separated from the input of the second circuit, are provided.
Furthermore, the semiconductor circuit is characterized in that the first circuit comprises a A/D converter which converts the inputted signals to a plurality of weighted binary digital signals, and the second circuit comprises a D/A converter which converts the plurality of weighted binary digital signals to multilevel signals.
It is preferable that the first circuit and/or second circuit be constructed using at least one neuron MOS transistor having a semiconductor region of a given conductivity type on a substrate, source and drain regions of an opposite conductivity type which are provided within this region, a floating gate electrode which is provided in a potentially floating state via an insulating film on a region separating the source and drain regions, and a plurality of input gate electrodes which are capacitively coupled with the floating gate electrode via an insulating film.
It is preferable that the second circuit be constructed using an N type neuron MOS transistor and P type neuron MOS transistor having a common floating gate, that the source of the N type MOS transistor and the source of the P type MOS transistor be electrically connected, and that the signal group be electrically coupled with the floating gate by means of capacity coupling.
Function
The circuit compr
Ohmi Tadahiro
Shibata Tadashi
Yamashita Takeo
Knuth Randall J.
Ohmi Tadahiro
Shibata Tadashi
Young Brian K.
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