Semiconductor chip with surface cover

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond

Reexamination Certificate

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C257S297000, C257S306000, C257S310000, C365S228000

Reexamination Certificate

active

06452283

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a semiconductor chip having circuits which are produced in at least one layer of a semiconductor substrate and are arranged in at least one group, and having at least one conductive protective layer which is arranged above at least one such circuit group and is electrically connected to at least one of the circuits.
Such a semiconductor chip is known from EP 0 378 306 A2. In the semiconductor chip in this publication, a first circuit group is arranged in a protected region and a second circuit group is arranged in an unprotected region. In the known semiconductor chip, the first region is protected by a conductive layer which is arranged above the wiring plane of the first circuit group. This conductive layer is electrically connected to the circuit group, and this circuit group operates properly only when the layer is intact.
In this case, the first circuit group includes a microprocessor and also associated peripheral circuits, such as memories and a transfer logic circuit. The memories may contain, in particular, secret information. It is also conceivable for the microprocessor to have a special structure which is particularly well suited to security-relevant functions. The conductive layer, whose intactness is constantly checked, prevents covert observation using a scanning electron microscope, for example, during operation of the circuit.
However, it is still possible to remove the protective layer and create replacement lines which are not situated above security-critical regions. In this way, the circuits can still be examined during operation, albeit only under very complex circumstances at present.
EP 0 169 941 A1 also shows a semiconductor circuit, having a passivation layer which is in the form of an equipotential surface and shields circuit parts situated beneath it. This passivation layer is incorporated into security logic as an active conductor track, so that removing it interrupts operation of the chip and makes dynamic analysis impossible.
However, if a kind of bypass line (which, even though it performs the line function of the passivation layer, does not perform the shielding function) is successfully fitted instead of the covering passivation layer, the semiconductor circuit is activated again in this known protective circuit.
EP 0 300 864 A2 discloses the practice of providing a conductive protective layer including two part-layers whose capacitance is evaluated. Although this does not make it a simple matter to replace one or both part-layers with other conductive structures, simulating the capacitance using other structures which expose at least parts of the circuit would bypass the security precaution. In any case, removing the layers and subsequently replacing them, for the purposes of making at least a static inspection of the semiconductor chip, cannot be detected later.
One method of removing layers and also of adding new layers, such as bypass lines, is the focused ion beam (FIB) method. Although this was developed primarily for eliminating errors and restructuring, it presents a considerable risk for security-critical semiconductor chips.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a semiconductor chip which overcomes the above-mentioned disadvantageous of the prior art apparatus of this general type, and which, in particular, is safe from FIB attacks. With the foregoing and other objects in view there is provided, in accordance with the invention a substrate of a semiconductor chip which has at least one protective sensor which is formed such that it is able to store a state in nonvolatile fashion. The detection connection of the protective sensor is connected to the conductive protective layer or to at least one of a plurality of conductive protective layers. The output connection of the protective sensor is connected to at least one of the circuits on the substrate such that the circuit cannot operate properly if there is a defined, nonvolatile level at the output connection of the protective sensor.
In accordance with an added feature of the invention, the protective sensor may advantageously be a transistor which has a very thin gate oxide as compared with transistors in the circuits. Alternatively, other components acting as fuses may be used, such as diodes. The important thing for a component intended to operate as a protective sensor is that a voltage can modify it in nonvolatile fashion.
In this context, nonvolatile means that not only is a stored state maintained after the supply voltage has been turned off and applied again, but also that removing and reapplying a conductive layer which produces a connection is detected and recorded. Thus, even if the layer is intact, it is possible to establish whether it has been removed previously or whether an attempt to do so has been made.
This is because it has been found that the structures treated using the FIB method become electrically charged. The voltage produced as a result of this is detected by the protective sensors and is evaluated by components of the circuit(s). If a protective sensor is a transistor which has a very thin gate oxide as compared with the transistors in the circuits, this gate oxide is destroyed by the voltage because of the ion beam. This can easily be evaluated.
The protective sensors can either be distributed on the semiconductor chip so that they cover the surface, or else a small number of sensors is sufficient.
The particular advantage of the invention is that removing the protective layer and subsequently adding a bypass line—if the presence of the protective layer is checked—is unsuccessful, since the protective sensor has already detected removal of the protective layer in nonvolatile fashion, and the circuit therefore no longer works and can consequently be operated neither with nor without a protective layer. The important thing here is that the manipulation of the protective layer has been stored in a nonvolatile fashion, which can be achieved by a gate oxide being destroyed, for example.
In accordance with an additional feature of the invention, the protective sensor is in the form of a nonvolatile memory cell which is formed using drain and source diffusion regions produced on both sides of a channel region in the semiconductor substrate. The protective sensor also has a fully insulated gate electrode, at least part of which is arranged above the channel region, and two control gate electrodes which are arranged above the insulated gate electrode. One of the control gate electrodes forms the detection connection, and the other control gate electrode and also the diffusion regions are connected to an evaluation circuit.
In this novel nonvolatile memory cell, a voltage produced by an ion beam results in the charge on the insulated gate being changed. The charge is not able to drain. The second control gate connection and the connections of the diffusion regions can be used to read, and hence detect, the modified state of the memory cell at any time.
Advantageously, the insulated gate is given an initial charge, and, when there are a plurality of protective sensors, initial charges are applied using different polarities, which means that manipulation is reliably detected.
In accordance with a concomitant feature of the invention, at least one of the circuits on the substrate includes at least one detection circuit connected to the output connection of the protective sensor.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a semiconductor chip with surface cover, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.


REFERENCES:
patent: 4593384 (1986-06-01), Kleijne
patent: 5389738 (1995-02-01), Piosenka et al.
patent:

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