Semiconductor chip with a porous single crystal layer and...

Details Semiconductor chip with a porous single crystal layer and... Semiconductor chip with a porous single crystal layer and...

2006-03-10

2009-12-15

Pham, Thanh V (Department: 2894)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Substrate dicing

C438S409000, C438S460000, C438S693000, C438S704000, C438S751000

Reexamination Certificate

active

07632696

ABSTRACT:
A semiconductor chip including a semiconductor substrate provided with a semiconductor device region and a porous single crystal layer, where the semiconductor device region is formed on the main surface portion of the semiconductor substrate, and the porous single crystal layer is formed in an inner region on the backside of the semiconductor substrate, and is comprised of erosion holes extending continuously from the backside of the semiconductor substrate in an inward direction of the semiconductor substrate, oxide films formed on inner surfaces of the erosion holes, and a single crystal portion.

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patent: 2003/0203598 (2003-10-01), Yamada et al.
patent: 2004/0262732 (2004-12-01), Noma et al.
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patent: 2004-214598 (2004-07-01), None
Ghandhi, “VLSI Fabrication Principles”, John Wiley & Sons, 1983, pp. 517+.
Chinese Office Action (with English translation) issued in Chinese Patent Application No. CN 2006100547362, dated Mar. 7, 2008.

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